IEEE Solid-States Circuits Magazine - Fall 2020 - 15
C IRCU IT INTU ITIONS
Ali Sheikholeslami
Voltage Regulators
W
Welcome to the 26th article in the
" Circuit Intuitions " column series.
As the title suggests, each article
provides insights and intuitions into
circuit design and analysis. These
articles are aimed at undergraduate
students but may serve the interests
of other readers as well. If you read
this article, I would appreciate your
comments and feedback as well as
your requests and suggestions for
future articles in this series. Please
email me your comments at ali@ece
.utoronto.ca.
In the previous article of this series
[1], we explained how digital blocks
sharing the same power supply with
an analog amplifier may inject noise
into the amplifier output through
their connections at the power supply
node and how this deteriorates the
signal quality measured by signal-tonoise ratio (SNR). We also presented
two simple techniques that reduce
this power supply noise by using 1) a
dedicated (i.e., not shared) power
supply for sensitive amplifiers and 2)
a bypass capacitor at the supply node
so as to attenuate the high-frequency
content of the noise. In this article,
we present a third approach, which
employs a voltage regulator that produces a clean VDD from a noisy VDD.
We have all had the experience of
trying to cut the rugged edges of a
sheet of paper for origami or other
purposes. As shown in Figure 1, we
can simply cut the rugged edge anywhere below the lowest notch. We
wish to do the same for a voltage
Digital Object Identifier 10.1109/MSSC.2020.3021866
Date of current version: 18 November 2020
regulator, as displayed in Figure 2.
Here, a voltage regulator is placed
between a noisy power supply and
the circuit of interest, modeled as a
parallel combination of R L and C L.
The noisy power supply voltage is
denoted by VDD + v dd, where VDD is
the intended dc power supply voltage
and v dd is the ripple or noise superimposed on top of VDD. Although
VDD + vdd
VREG
FIGURE 1: Like cutting the rugged edge of a
sheet of paper, we wish to cut the ripple on
the power supply voltage.
vin (t ) =
VDD + vdd (t )
the voltage of the noisy power supply may fluctuate between Vmax and
Vmin, the regulator is expected to
supply a constant (i.e., with no ripple) voltage VREG to the load. We wish
to simply cut the ripple or the noise
from the top end of a noisy VDD and
create a clean, constant, regulated
voltage VREG. Depending on the load
(being an analog amplifier), we specify a target dc supply voltage for its
operation via reference voltage VREF.
Before we explore methods of cutting the ripple from a noisy VDD, let
us list two desirable properties that
we wish to see in a voltage regulator.
Clearly, the most desirable property
should be the rejection of any ripple
or noise at the regulator output or,
equivalently, minimizing the transfer function from the power supply
vout (t ) = VREG
Voltage
Regulator
RL
CL
VREF
vin (t )
Vmax
Vmin
vout (t )
VDD + vdd (t )
VDD
VREG
VREG
Time
Time
FIGURE 2: A voltage regulator removes the ripple from a noisy VDD and produces a clean,
constant supply voltage (VREG) for use by sensitive analog amplifiers. Note that the parallel
combination of RL and CL represents an equivalent circuit looking into the power supply node
of an analog amplifier.
IEEE SOLID-STATE CIRCUITS MAGAZINE
FA L L 2 0 2 0
15
IEEE Solid-States Circuits Magazine - Fall 2020
Table of Contents for the Digital Edition of IEEE Solid-States Circuits Magazine - Fall 2020
Contents
IEEE Solid-States Circuits Magazine - Fall 2020 - Cover1
IEEE Solid-States Circuits Magazine - Fall 2020 - Cover2
IEEE Solid-States Circuits Magazine - Fall 2020 - Contents
IEEE Solid-States Circuits Magazine - Fall 2020 - 2
IEEE Solid-States Circuits Magazine - Fall 2020 - 3
IEEE Solid-States Circuits Magazine - Fall 2020 - 4
IEEE Solid-States Circuits Magazine - Fall 2020 - 5
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