IEEE Solid-States Circuits Magazine - Fall 2020 - 16

ripple to the regulator output voltage. This transfer function, defined
as the ratio of the noise power at the
regulator output to the noise power
at its input, is an indication of how
well the regulator stands up to its
name. Another desired property is
the maximum constant voltage the
regulator can produce (i.e., the maximum value of VREG) given a set of
constraints such as Vmin and Vmax, as
defined in Figure 2.

The first idea that comes to mind
when implementing a regulator is to
monitor the output voltage of the
regulator and compare it against
the target VREF. If it falls below VREF,
we can pump in more current to
the load so that the output voltage
rises toward VREF. If it goes above,
we can lower the current supplied to
the load so that the regulator voltage falls toward VREF. This concept,
known as negative feedback, is pre-

vin (t ) = VDD + vdd (t )
CA
+

VREF

vout (t ) = VREG

Controlled
Current
Source

FIGURE 3: The principle of operation of a regulated power supply. The voltage across the
load (VREG) is compared against the target voltage (VREF) to provide a variable current to the
load and to bring VREG closer to VREF.

VREF

+
-

+
VDropout

vout (t ) = VREG
RL

FIGURE 4: A PMOS transistor is employed as a controlled current source in a regulated voltage supply (see Figure 3).

vdd
A

vout
CL

vdd

+
-

gmRL
1 + s/ωL
A0

1 + s/ω0

(a)

(b)

vout
ωL =

1
RLCL

FIGURE 5: (a) Redrawing a simplified voltage regulator of Figure 4 at low frequencies and
(b) its equivalent block diagram.

FA L L 2 0 2 0

IEEE SOLID-STATE CIRCUITS MAGAZINE

The first idea
that comes to
mind when
implementing
a regulator is
to monitor the
output voltage
of the regulator
and compare
it against the
target VREF .

sented in Figure 3, where we employ
an amplifier at the front end, called
the error amplifier, to observe the
difference between the load voltage
and the reference voltage, amplify
the difference, and feed this to a
voltage-controlled current source.
Depending on whether the error is
positive or negative, the current
source pumps more or less current,
respectively, to the load, bringing
the output voltage closer to VREF. The
capacitor C A represents the sum of
all the parasitic capacitances of the
node connecting the amplifier output to the current source input and
any capacitance that we may wish to
add for the proper operation of this
regulator. Similarly, C L represents
the load capacitance in addition to
any capacitance we insert at the output node. As we will see later, we use
C A and C L to control the dynamic
behavior of the regulator.
L et us now con sider using a
PMOS transistor as the voltage-controlled current source to build our
first regulator, as depicted in Figure 4.
As the small-signal gain from the
gate to the drain of the PMOS transistor is negative, we have absorbed
this negative sign by swapping the
two inputs of the error amplifier,
maintaining negative feedback. The
noisy power supply provides power
to both the load (through the PMOS
transistor) and the error amplifier.
As a result, v dd can find its way to
the output node either through
the source of the PMOS transistor
or through the power supply node
of the error amplifier. For simplicity, we consider only the former in
this article.

IEEE Solid-States Circuits Magazine - Fall 2020

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