IEEE Solid-States Circuits Magazine - Fall 2020 - 22

in Figure 1(c) from the DARPA Photonics in the Package for Extreme
Scalability project [13], the figure of
merit (FOM), defined as the bandwidth density/energy efficiency, also
presents a big performance gap in
few-meter-distance scenarios.
Table 1 summarizes state-o fthe-art interconnect approaches.
Latency and cost are not included
due to a lack of reported quantitative numbers. Determining which
part the power consumption is in--
cluded in depends on whether the
corresponding element is needed
to achieve the target performance,
such as the BER. For example, in
[18]-[20], DSP is necessary for the
signal equalization to achieve the
target BERs; therefore, power consumptions up to DSP are included.
The area is counted by the bottleneck of the link. For example, the
size per lane in [17], [41], and [110] is
constrained by the channel, which
is then used for the area calculation
base. The size per lane in [18]-[20]
is constrained by the active transceiver chip area, which is then used
for the area calculation.
Besides the conventionally adopted
FOM (FOM1 = bandwidth density/

energy efficiency), the other FOM
[FOM 2, defined as-bandwidth density ) log(BER) /energy efficiency]
is introduced to include the BER be--
cause BER is a good indicator of the
additional needed power consumption when further processing is re--
quired for better performance. As
shown in the table, a terahertz (THz)
interconnect [14], [15], enabled by
small size, low loss, and wide bandwidth channels, shows superior performance and holds great potential
to complement the EI and the OI in
interconnect links that have a communication range from centimeters
up to a few meters to fill the interconnect gap. It leverages both highspeed electronics and ultralow-loss,
quasi-optical waveguide channels to
achieve a large bandwidth density,
high energy efficiency, low cost and
latency, and scalability with active
device advancements.
Because very short- and very longdistance links seem to be unarguably
addressed by the EI and OI, correspondingly, the most challenging scenario is a communication distance in
the vicinity of 0.1-10 m. Figure 2(a),
through a radar chart, presents the
key interconnect performances for

both the EI and OI in this reach range
and illustrates the interconnects' corresponding challenges. Therefore,
we believe that a sub-THz/THz interconnect possesses great potential
to leverage the advantages of both
the EI and OI, complementing them
to cover distance gaps, as shown in
Figure 2(b).
This article does not aim to provide a comprehensive survey of the
literature covering silicon-based subTHz/THz developments. It focuses
on discussing interconnect application for a reach range of 0.1-10 m.
It reviews challenges and discusses
existing and possible techniques on
both passives and actives and the
potential of the sub-THz/THz interconnect in this important field. If
readers are interested in a more comprehensive review of silicon-based
sub-THz/THz ICs and system developments, good references include
[93] and [106].

Why Meter Reach Is the Devil
Channel Loss Determines the
Communication Distance
The loss of passive channels forms
the fundamental limit to maximum

TABLE 1. A COMPARISON OF STATE-OF-THE-ART INTERCONNECT SCHEMES.
 

[110]

[16]

[17]

[41]

[18]

[19]

[20]

[21]

[22]

TECHNOLOGY

40-NM
CMOS

28-NM
CMOS

65-NM
CMOS

65-NM
CMOS

7-NM
FINFET

7-NM
FINFET

10-NM
FINFET

SILICON
PHOTONIC
MCM

SILICON
PHOTONIC
MCM

Data rate (Gb/s)

12.7

25

12.1

15

60

56

56.25

10

960

Area per
channel (mm2)

3.14

3.16

0.15

0.25

0.84

0.468

0.72

N/A

N/A

Distance (cm)

100

N/A

4.6

1.87

N/A

N/A

N/A

N/A

N/A

Equivalent path
loss (dB)

N/A

50

N/A

N/A

32

42.5

38

N/A

N/A

Energy
efficiency (pJ/b)

4.1

16.32

1.29

1.41

6.9

4.36

7.7

4.23

5

Bandwidth density
(Gb/s/mm2)

4.04

7.91

80.67

60

71.43

119.66

78.13

N/A

100

BER

1.0E-12

1.0E-12

1.0E-12

1.0E-12

1.0E-06

1.0E-07

1.0E-05

1.0E-12

N/A

FOM1

0.99

0.48

62.57

42.65

10.35

27.46

10.15

N/A

20

FOM2

11.84

5.81

750.82

511.85

62.11

192.24

50.73

N/A

N/A

FinFET: fin field-effect transistor.

22	

FA L L 2 0 2 0	

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IEEE Solid-States Circuits Magazine - Fall 2020

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