IEEE Solid-States Circuits Magazine - Fall 2020 - 28

non-Foster-based negative capacitance and inductance techniques
typically involve active devices,
which not only consume extra power
but contribute additional noise. A
second and more challenging aspect
is a circuit stability issue that results
because non-Foster techniques often
include positive feedback. Therefore,
although they offer great potential,
non-Foster schemes and implementation methods still have a long way
to go.

Actives for Sub-THz/THz
Interconnects
Exciting Advances for Sub-THz/THz
Active Circuits and Systems
in Silicon

Dielectric Constant

In addition to passive channel developments, active circuits are the other
key. To meet the stringent interconnect cost requirement, commercial
silicon-based processes are the ultimate options. It has been exciting to
witness silicon-based sub-THz/THz
circuits and systems demonstrate
significant advancements through

the past decade, starting from the
first generation of silicon-based THz
generators [85]-[87]. One contributing factor is the process advancement leading to a higher device f T and
fmax [88]. However, for recent process
generations, the core device speed
growth resulting from device scaling is offset by the larger parasitics
from both the device itself, such as
additional polysilicon gate resistivity, and interconnect parasitics [89].
Therefore, recent process scaling
advancements mainly benefit digital circuits, not sub-THz/THz ones.
However, novel design ideas at the
architecture, circuit, and component
levels have continuously advanced
performance in both circuits and systems at sub-THz/THz frequencies,
operating even beyond device cutoff
frequencies [94]-[96], [98].
For sub-THz/THz signal generation,
the key challenge is to generate a useful output power level (for example,
milliwatts) with the highest possible
power efficiency to facilitate deployment. A 300-GHz signal generator with
5.4 mW of output power and a 5.1%

9
8
7

6
100

200
300
400
Frequency (GHz)
(a)

500

6
100

200
300
400
Frequency (GHz)
(b)

500

Original Channel Profile
Fitting-Compensation Curve
Channel Profile After Compensation
FIGURE 8: A comparison of dispersion compensation through two fitting profiles for the
silicon DWG channel frequency-dependent dielectric constant: (a) linear fitting and
(b) second-order fitting.

FA L L 2 0 2 0

IEEE SOLID-STATE CIRCUITS MAGAZINE

efficiency has been demonstrated in
a 65-nm CMOS [90]. Power efficiency
of more than 25% has been achieved
for a 165-GHz signal generator with
0.66 dBm of output power, also in a 65-nm
CMOS [91], [92]. This indicates the
potential for reasonable high-power
efficiency in sub-THz/THz regimes in
silicon processes. A very good survey,
covering the literature up to 2018, of
silicon-based sub-THz/THz signal
generation output power versus the
frequency is included in [93] for the
readers' interest.
Novel architectures and design
ideas further push the operating frequency and performance. For example, a 317-GHz signal was generated
in a 0.13-µm silicon-germanium process with a 0.54% efficiency and thenrecord 3.3-mW output power [94]. A
coherent 36-element signal generation array at 586.7 GHz, with a total
output power of 0.1 dBm and an efficiency of 0.08%, is demonstrated in a
40-nm CMOS process [95]. A 64-element signal generation at 420 GHz,
with record total output power of
9.2 dBm and an efficiency of 0.19%,
was recently described in a 0.13-µm
silicon-germanium process [96]. Using
a dense array, a 9-dBm output power
with a very good efficiency of 1.8% at
280 GHz has been shown in a 65-nm
CMOS, as well [97]. A 16-element, 416-GHz
beamforming array radiator with a
beam-steering angle of !60° demonstrates an output power of -3 dBm
and a frequency-tuning range of 1.7%,
also in a 65-nm CMOS [98].
On the receiver side, the NF, or the
noise-equivalent power, is the most
critical specification to determine
the receiver noise floor and sensitivity. Depending on the application,
the bandwidth requirements are different. Wideband communication
demands a wide bandwidth along the
link, further challenging the receiver
design, due to the large integrated
noise. Sub-THz/THz receivers in silicon are nicely reviewed in [93] and
[99] for the readers' interest. During
the past decade, NFs decreased from
more than 40 dB to roughly 20 dB
for carrier frequencies higher than

IEEE Solid-States Circuits Magazine - Fall 2020

Table of Contents for the Digital Edition of IEEE Solid-States Circuits Magazine - Fall 2020