IEEE Solid-States Circuits Magazine - Fall 2021 - 163

IEEE Embedded Systems Letters. Note
that, for this special issue, a 3-min
video preview will be required later
for accepted papers. The deadline to
submit is 10 September 2021.
Download both calls for papers
and see a full list of topics, important
dates, and guest editors on
our website (https://ieee-ceda.org/
esl-call-papers).
Call for Papers: IEEE Journal
on Exploratory Solid-State
Computational Devices and
Circuits-Special Issue
The special issue on Cryogenic Semiconductor
Devices and Circuits for
Computing covers emerging cryogenic
semiconductor devices and circuits
for high performance computation.
The focus and emphasis of these special
topic papers is beyond Josephson
junction-based devices and circuits,
such as single-flux quantum circuits.
Some example topics of interest include
cryogenic memories and shortrange
and long-range connectivity in
devices and circuits among others.
Papers are encouraged that address
new emerging functionality at cryogenic
temperatures at all levels (materials,
devices, circuits, and
systems), including showing
at a system level how such
advanced functions can
be useful for computing
tasks and understanding
the system-level energy
efficiency and speed.
The deadline to submit
is 1 October 2021.
For a full list of topics,
submission guidelines,
and dates, download the call
for papers.
others.
Call for Participation: SLIP
2021 Workshop
The 2021 ACM/IEEE International
Workshop on System-Level Interconnect
Pathfinding (SLIP) is the 23rd
edition of the workshop and will be
Some example
topics of interest
include cryogenic
memories and
short-range
and long-range
connectivity
in devices and
circuits among
hosted virtually on 4 November 2021.
SLIP, cohosted with the 2021 International
Conference on Computer-Aided
Design, will bring together researchers
and practitioners who have a shared interest
in the challenges
and futures of systemlevel
interconnect and
who represent wideranging
backgrounds that
span systems, ap plication,
design, and technology.
There are two special sessions
this year: 3DIC Architectures
and High-Speed,
Energy-Efficient On/Off-Chip
Interconnects; and Design
Technology Co-Optimization-Enhanced
Physical Design and EDA Flows.
The deadlines to submit abstracts
and papers are 8 August and 15
August 2021, respectively. For a full
list of topics, submission guidelines,
and more, visit the SLIP website
(http://www.sliponline.org/).
ERRATA
T
The Summer 2021 issue of IEEE Solid-State Circuits Magazine
contained an error in [1]. The image with Po-Hsuan
Wei playing soccer refers to a soccer match between Stanford
and Ohio State University. This is incorrect, and it
should be Stanford and Oregon State University.
Digital Object Identifier 10.1109/MSSC.2021.3119762
Date of current version: 17 November 2021
Reference
[1] A. Altvater, " In step with Po-Hsuan Wei, " IEEE Solid-State Circuits Mag.,
vol. 13, no. 3, p. 68, Summer 2021. doi: 10.1109/MSSC.2021.3089086.
IEEE SOLID-STATE CIRCUITS MAGAZINE
FALL 2021
163
https://www.ieee-ceda.org/esl-call-papers https://www.ieee-ceda.org/esl-call-papers http://www.sliponline.org/
IEEE Solid-States Circuits Magazine - Fall 2021

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