IEEE Solid-States Circuits Magazine - Fall 2021 - 86

integration. As RF frequencies increase,
the antenna /2m spacing will
decrease; e.g., at 73 GHz, it is 0.41 cm
and at 140 GHz it is 0.21 cm, while at
500 GHz it is 0.06 cm, making it challenging
to space PAs and LNAs so that
the RF bumps are the same pitch as
the antenna spacing. In addition, the
RFIC die will not decrease in size at
the same rate, creating a need to use
dummy antennas on the package so
that the package can fit the RFIC. The
research question that arises here is,
" Can 3D heterogeneous integration
at nano/micro levels be leveraged
to overcome the integration issues? "
The other issue is how to integrate
the antennas on the package with the
wireless chiplet, FPGA, and still manage
to deliver power efficiently.
Power delivery is more of a challenge
for 3D integrated systems. Power
density is already an issue for high
frequency wireless systems as can be
seen in [40] and managing thermals
will be challenging. Sorting known
good die, test/debug methods, assembly
flows are known challenges
with 2.5D/3D integration. Of course,
there will be more design challenges
that will be uncovered as we start
exploring how to build these 2D/3D
sub-THz wireless systems. One of the
learnings that we can take from our
academic and industry colleagues is
that if modularity, standards, and
flexibility are exploited to their fullest
in an intelligent way, then we will
be well on our way to achieving our
eventual nirvana, the intelligent radio
cube. These radio cubes can be
distributed across the entire next
generation wireless network enabling
a converged intelligent communicatecompute
platform.
In addition to next generation wireless
applications, there are many other
applications that can benefit from
2D and 3D heterogeneous integration.
There is ongoing research and development
work in industry and academia
to fully determine and quantify
the impact of disaggregation. Updates
on this research have been presented
recently at ISSCC 2021, the 2021 IEEE
Custom IC Conference (CICC 2021),
86
FALL 2021
and the 2021 Symposium on VLSI. The
reader is encouraged to review the
published material.
In conclusion, the next decade
will be about convergence of intelligence,
compute, and communications.
Innovations in 2D and 3D heterogeneous
integration interconnect technologies
and design methodologies
enable enhanced compute-communicate
platforms that can be used
to build next generation wireless
infrastructure. Standardized interfaces
in 2.5D and 3D such as AIB ease
customization and potentially enable
a large chiplet ecosystem. We
are now entering a new dimension of
Moore's law.
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https://www.cisco.com/c/en/us/solutions/collateral/data-center-virtualization/big-data/solution-overview-c22-740248.htm https://www.cisco.com/c/en/us/solutions/collateral/data-center-virtualization/big-data/solution-overview-c22-740248.htm https://www.cisco.com/c/en/us/solutions/collateral/data-center-virtualization/big-data/solution-overview-c22-740248.htm https://www.cisco.com/c/en/us/solutions/collateral/data-center-virtualization/big-data/solution-overview-c22-740248.htm https://news.samsung.com/global/samsungs-6g--white-paper-lays-out-the-companys-vision-for-the-next-generation-of-communications-technology https://news.samsung.com/global/samsungs-6g--white-paper-lays-out-the-companys-vision-for-the-next-generation-of-communications-technology https://news.samsung.com/global/samsungs-6g--white-paper-lays-out-the-companys-vision-for-the-next-generation-of-communications-technology https://news.samsung.com/global/samsungs-6g--white-paper-lays-out-the-companys-vision-for-the-next-generation-of-communications-technology https://news.samsung.com/global/samsungs-6g--white-paper-lays-out-the-companys-vision-for-the-next-generation-of-communications-technology https://spectrum.ieee.org/cerebras-giant-ai-chip-now-has-a-trillions-more-transistors https://spectrum.ieee.org/cerebras-giant-ai-chip-now-has-a-trillions-more-transistors https://spectrum.ieee.org/cerebras-giant-ai-chip-now-has-a-trillions-more-transistors https://www.anandtech.com/show/16725/amd-demonstrates-stacked-vcache-technology-2-tbsec-for-15-gaming https://www.anandtech.com/show/16725/amd-demonstrates-stacked-vcache-technology-2-tbsec-for-15-gaming http://www.Embedded.com https://www.embedded.com/altera-ships-its-first-cyclone-v-soc-devices/ https://www.anandtech.com/show/16725/amd-demonstrates-stacked-vcache-technology-2-tbsec-for-15-gaming https://www.anandtech.com/show/16725/amd-demonstrates-stacked-vcache-technology-2-tbsec-for-15-gaming https://www.embedded.com/altera-ships-its-first-cyclone-v-soc-devices/ https://eps.ieee.org/technology/heterogeneous-integration-roadmap.html https://www.embedded.com/altera-ships-its-first-cyclone-v-soc-devices/ https://eps.ieee.org/technology/heterogeneous-integration-roadmap.html https://eps.ieee.org/technology/heterogeneous-integration-roadmap.html

IEEE Solid-States Circuits Magazine - Fall 2021

Table of Contents for the Digital Edition of IEEE Solid-States Circuits Magazine - Fall 2021