IEEE Solid-States Circuits Magazine - Fall 2022 - 71

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2022 IEEE SSCS Kolkata Section Report
The IEEE Solid-State Circuits Society
(SSCS) Kolkata Chapter is always dedicated
to bridging the gap between
academia and industry. For that purpose,
we have created a program
called VLSI Weekender. It is a monthly
event that emphasizes the process
of learning from device physics to
modern IC making. The lectures were
delivered online, and the resource
persons were from both academia
and industry. It is an ongoing event,
and the following is the schedule
thus far:
The MCKV Institute of Engineering,
in association with the IEEE SSCS
Kolkata Chapter, organized the technical
competitive event TECHNOTICA
2021-2022. It was an intercollege,
offline event held at the MCKV
Institute of Engineering on 31 March
2022. Students from various colleges
participated in prototype-making
contests. Industry expert Dr. Dhritinandan
Kole, R&D executive for
Eltron Wireless, was invited as judge
for the event.
The IEEE SSCS Kolkata Chapter, in
association with the IEEE MSIT Student
Branch and the Department of
Electronics and Communications
Engineering MSIT organized the
one-day technical session " Prospects
of FET Based Neuromorphic
Computing. " The offline event was
held in Meghnad Saha Institute of
Technology on 11 May 2022, and the
resource person was Mr. Dipanjan
sen, a Ph.D. scholar with the Department
of Engineering Science and
Mechanics from The Pennsylvania
State University. Mostly undergraduate
students attended the event. It
was an insightful and interactive
session. The session ended with a
word of thanks from the secretary
of the IEEE SSCS Kolkata Chapter.
The IEEE SSCS Kolkata Chapter
recently organized the Distinguished
Digital Object Identifier 10.1109/MSSC.2022.3194376
Date of current version: 11 November 2022
Lecture " Widely Tunable Active TrueTime-Delay
Line and MillimeterWave
VCO, " by Prof. Nagendra
Krishnapura on 23 July 2022 in virtual
mode. Approximately 30 participants
attended the event. The program
started at 3:30 p.m. local time
after a brief introduction of Krishnapura
by secretary Dr. Swarnil Roy. It
was an interactive session, with a lot
of questions from the audience. At
the end of the event, Section Chair
Dr. Sagar Mukherjee delivered a
word of thanks.
Biography
Krishnapura obtained his B.Tech.
from the Indian Institute of Technology,
Madras, India, and his Ph.D.
degree from Columbia University,
New York. He has worked as an
analog design engineer at Celight,
Multilink, and Vitesse Semiconductor.
He has taught analog circuit
design courses at Columbia University
as an adjunct faculty member.
He is currently a professor at
the Indian Institute of Technology,
Madras. His interests are analog
and RF circuit design and analog
signal processing.
Abstract
An all-pass filter architecture that
can be generalized to high orders,
and can be realized using active circuits,
is proposed. Using this, a compact
true-time-delay element with
a widely tunable delay and a large
delay-bandwidth product is demonstrated.
Coarse tuning of delay
is realized by changing the filter's
order while keeping the bandwidth
constant and fine-tuning is implemented
by changing the filter's
bandwidth utilizing the delay-bandwidth
tradeoff. A test chip fabricated
in a 130-nm CMOS process
demonstrates a delay tuning range
of 0.25-1.7 ns over a bandwidth of
2 GHz while maintaining a magnitude
deviation of +/−0.7 dB. The
filter has a worst-case noise figure
of 23 dB, and −40-dB IM3 distortion
for 37-mV ppd inputs. The chip
dissipates 112-364 mW of power
Students attending TECHNOTICA 2021-2022.
The VLSI Weekender Virtual Lecture.
IEEE SOLID-STATE CIRCUITS MAGAZINE
FALL 2022
71
IEEE Solid-States Circuits Magazine - Fall 2022

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