IEEE Solid-States Circuits Magazine - Fall 2023 - 10

1,000
200
400
600
800
66
68
70
72
Time (ps)
FIGURE 12: Output waveforms of 32X interpolation network.
VQ
VI
VQ
VI
VI VQ
VI
VI
(a)
VQ
VQ
VI
VI
VQ
VQ
WP = 300 nm
WN = 200 nm
WP = 600 nm
WN = 400 nm
(c)
Inv16 R16
WP = 300 nm
WN = 200 nm
Thermometer
Code
Binary
Code
(b)
FIGURE 13: (a) Illustration of four-quadrant interpolation, (b) its implementation, and (c) the
realization of the two MUX stages.
In the last step of our effort, we
compute the PI output jitter by running
a transient noise simulation with minimum
and maximum noise frequencies
of 1 MHz and 200 GHz, respectively.
Plotting the output eye diagram and
examining one of the edges (Figure 14),
we note a peak-to-peak jitter of about
MUX
Inv0 R0
74
76
78
0.44
0.46
0.48
0.5
0.52
0.54
0.56
47 47.1 47.2
Time (ps)
FIGURE 14: PI output jitter.
60 fs. For a Gaussian distribution, we
estimate the rms value (i.e., the standard
deviation) to be about one-sixth
of the peak-to-peak swing. Thus, the
rms jitter is less than 10 fs.
Inv1 R1
References
[1] M.-S. Chen, A. Hafez, and C.-K. K. Yang,
RF = 3 kΩ
X
WP = 8 µm
WN = 4 µm
Vout
" A 0.1-1.5 GHz 8-bit inverter-based digital-to-phase
converter
using harmonic
rejection, " IEEE J. Solid-State Circuits, vol.
48, no. 11, pp. 2681-2692, Nov. 2013, doi:
10.1109/JSSC.2013.2274892.
[2] J. Lee, G. Jung, S. Kim, and M. Lee, " An
8-bit 1.24 mW sub-1ps DNL sub-1V supply
inverter-based phase interpolator using a
PVT-tracking adaptive-bias circuit, " IEEE
Trans. Circuits Syst., II, Exp. Briefs, vol.
70, no. 8, pp. 2749-2753, Aug. 2023, doi:
10.1109/TCSII.2023.3247595.
[3] J. Hu, X. Wang, and Z. Zhu, " A 50-ps gated
VCRO-based TDC with compact phase interpolators
for flash LiDAR, " IEEE Trans.
Circuits Syst. I, Reg. Papers, vol. 69, no. 12,
pp. 5096-5117, Dec. 2022, doi: 10.1109/
TCSI.2022.3200944.
[4] Y. Huang and B. Chen, " An 8b injectionlocked
phase rotator with dynamic multiphase
injection for 28/56/112Gb/s SerDes
application, " in Proc. IEEE Int. Solid- State
Circuits Conf. (ISSCC), Feb. 2019, pp. 486-
488, doi: 10.1109/ISSCC.2019.8662292.
[5] G. Souliotis, A. Tsimpos, and S. Vlassis,
" Phase interpolator-based clock and data recovery
with jitter optimization, " IEEE Open
J. Circuits Syst., vol. 4, pp. 203-217, Aug.
2023, doi: 10.1109/OJCAS.2023.3295649.
EDITOR'S NOTE (continued from p. 4)
We hope you enjoy reading IEEE
Solid-State Circuits Magazine. Please
send comments to me at lbelosto@
ieee.org.
Appendix: Related Articles
[A1] M. Zhang et al., " Wireless compact neural
interface for freely moving animal
subjects: A review on wireless neural interface
SoC designs, " IEEE Solid-State Circuits
Mag., vol. 15, no. 4, pp. 20-29, Fall
2023, doi: 10.1109/MSSC.2023.3312227.
[A2] Y. Jia and L. Zhao, " Implantable medical
devices for wireless optical neuromodulation
and neural recording: Energy10
FALL
2023
efficient integrated circuit and system
design, " IEEE Solid-State Circuits
Mag., vol. 15, no. 4, pp. 30-40, Fall
2023, doi: 10.1109/MSSC.2023.3305589.
[A3] M. Shoaran, " Next-generation closedloop
neural
interfaces: Circuit and AIdriven
innovations, " IEEE Solid-State Circuits
Mag., vol. 15, no. 4, pp. 41-49, Fall
2023, doi: 10.1109/MSSC.2023.3309782.
[A4] C. Sawigun, X. Yang, and C. M. Lopez, " Ultra-low-power
voltage references: Exploring
picowatt-level design using CMOS and
hybrid architectures, " IEEE Solid-State Circuits
Mag., vol. 15, no. 4, pp. 50-57, Fall
2023, doi: 10.1109/MSSC.2023.3309769.
[A5] A. Concannon, " Evolution of ESD robust IC
design: How ESD design and ESD control
have changed our industry, " IEEE Solid-State
IEEE SOLID-STATE CIRCUITS MAGAZINE
Circuits Mag., vol. 15, no. 4, pp. 58-63, Fall
2023, doi: 10.1109/MSSC.2023.3298872.
[A6] A. Sheikholeslami, " Tellegen's theorem
[Circuit Intuitions], " IEEE Solid-State Circuits
Mag., vol. 15, no. 4, pp. 11-12, Fall
2023, doi: 10.1109/MSSC.2023.3315668.
[A7] B. Razavi, " The design of a phase interpolator
[The Analog Mind], " IEEE
Solid-State Circuits Mag., vol. 15, no. 4,
pp. 6-10, Fall 2023, doi: 10.1109/MSSC.
2023.3315653.
[A8] C. Mangelsdorf, " Phase data: You're not
going to throw that away, are you? [Shop
Talk: What You Didn't Learn in School], "
IEEE Solid-State Circuits Mag., vol. 15,
no. 4, pp. 13-19, Fall 2023, doi: 10.1109/
MSSC.2023.3315669.
Voltage (mV)
Voltage (V)
IEEE Solid-States Circuits Magazine - Fall 2023

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