IEEE Solid-States Circuits Magazine - Fall 2023 - 33

for evoking neural activities has approximately
3 V VF. The high supply
voltage requirement not only contributes
to increased power consumption
but also presents higher demands for
the inductive link in terms of voltage
conversion efficiency and power conversion
efficiency. In a recent work
[23], we have proposed a novel voltage-boosted
SCS (VB-SCS) structure
to reduce the supply voltage requirement
[Figure 1(c)]. During the charging
phase, two storage capacitors are
connected in parallel and charged to
the supply voltage. Subsequently, in
the stimulation phase, the two storage
capacitors are connected in series
to drive the LED, resulting in a boosted
LED driving voltage of up to two
times the supply voltage. The measured
transient waveforms of the VBSCS
[Figure 1(d)] show that the VB-SCS
can deliver an 8-mA LED current at a
3.6 V driving voltage when the power
supply is only 1.8 V. This approach
reduces the required voltage by half
while concurrently maintaining the be -
nefits of both the CCS and SCS. The
VB-SCS facilitates WPT, improves the
efficiency of LED driving, and enables
technology scaling.
AFE Designs for Neural Recording
Different types of neural signals exhibit
distinct amplitudes and frequency
bands specific to each signal type (Figure
2). Local field potentials (LFPs) and
action potentials (APs) demonstrate
biomarkers that are valuable in both
fundamental neuroscience research
and clinical applications [24], [25],
[26]. LFPs typically have a frequency
of up to 500 Hz and an amplitude
from 1 μV to 1 mV [27]. APs generally
occupy the frequency band from
250 Hz to 10 kHz with an amplitude
from 10 μV to 1 mV [28]. The neural
recording AFE in wireless IMDs needs
to satisfy multiple specifications, such
as bandwidth, noise, and power, to
ensure a faithful and accurate recording
of neural signals [29]. To capture
both APs and LFPs, the AFE needs to
have a bandwidth larger than 10 kHz.
Given that the AFE is critical in determining
the SNR of the signal chain, it
typically requires less than 10 μVRMS
input-referred noise. In the presence
of large artifacts, which may be 10-20
times larger than the neural signals of
interest, the AFE is expected to have
an SNDR larger than 80 dB [30]. To
eliminate dc offset, the AFE requires a
high-pass signal transfer function with
a corner frequency of less than 1 Hz.
In addition, the AFE needs a high input
impedance to prevent signal attenuation
and tissue damage. Finally, considering
the limited power budget, the
AFE should be low power, typically on
the order of microwatt.
There has been a substantial amount
of research in the past two decades
on neural recording AFEs. A dedicated
LNA followed by a moderate-resolution
ADC has been the dominant candidate
(Figure 3)
[29],
[30],
[31],
[32],
[33],
[34], [35], [36], [37], [38], [39], [40],
[41]. The dc-coupled LNA naturally
has ultra-high input impedance (ZIN)
[36] [37], [38], [39], [40]. However, the
dc-coupled LNA typically requires an
additional servo loop to cancel the
electrode dc offset. The capacitively
coupled LNA, capable of blocking
electrode dc offset, is another widely
adopted topology in neural recording
AFEs [31], [32], [33], [34], [35]. The input
capacitance and the feedback capacitance
are properly chosen to set
the voltage gain while minimizing the
signal attenuation at the electrode.
Since the sub-1-Hz low-cut corner
1
SNDR and DR: > 80 dB
100 m
10 m
DC Offset
1 m
LFP-Subcortical
100 µ
10 µ
1 µ
AP
LFP-ECoG
Integrated Noise:
< 10 µVRMS
0.1 110
1/f Noise
100
Frequency (Hz)
FIGURE 2: Amplitude and frequency characteristics of neural signals and the neural
recording AFE design requirements. ECoG: electrocorticography.
IEEE SOLID-STATE CIRCUITS MAGAZINE
FALL 2023
33
1 k 10 k
BW: 1-10 kHz
Stimulation Artifact
frequency requires a large time constant
of the feedback capacitance and
resistance, pseudoresistors are commonly
used to realize large resistance
[31]. Considering the crucial role of
the LNA in the neural recording AFE,
lots of publications have discussed
optimizing the noise performance
and energy efficiency of the LNA [31],
[32], [33], [39], [42], [43], [44]. The
inverter-based amplifier is popular in
recent designs as it realizes current
reuse [35], [42], [43]. This technique
increases the transconductance with
the same supply current, improving
the energy efficiency significantly.
The chopper-stabilized amplifier
is another popular topology as the
chopping technique can effectively
mitigate the low-frequency flicker
noise without increasing the area
of the input devices [29], [30], [44],
[45]. The chopper-stabilized amplifier
commonly employs a dc servo
loop to realize high-pass filtering,
which has higher linearity than the
pseudoresistor [30]. However, the
chopping significantly reduces ZIN
as the chopper switches and input capacitance
form a switched-capacitor
resistance. Thus, recent chopperstabilized
amplifiers are equipped
with ZIN boosting techniques, such as
adding a positive feedback loop [45]
or an auxiliary precharge path [29].
These conventional neural recording
AFE designs that utilize an LNA
Voltage (V)
IEEE Solid-States Circuits Magazine - Fall 2023

Table of Contents for the Digital Edition of IEEE Solid-States Circuits Magazine - Fall 2023
