IEEE Solid-States Circuits Magazine - Spring 2020 - 38

Implantable ASIC

Implantable ASIC
DSP/FPGA /MCU

PC/Offline
Detected Spikes

Extracted Features

Sorted Spikes Clusters

Action Potential
Stimulation Control
SNR Enhancement/ Spike Extraction
Spike Detection Spike Train Analysis

Template
Matching

PCA /k- Means/SVM

Preprocessing

FE

Compression

Classification

Filtering
SNR Enhancement

Spectrum
Analysis

Frequency
Band Selection

PCA /k- Means/SVM

FE + ADC

Decoding Identification
Field Potential

Filtered LFP

Frequency Spectrum

Selected Spectrum Power

FIGURE 5: Neural signal processing for real-time, closed-loop applications. ASIC: application-specific IC; DSP: digital signal processor;
FPGA: field-programmable gate array; PCA: principal-component analysis; SNR: signal-to-noise ratio; SVM: support vector machine;
MCU: microcontroller.

TABLE 2. TYPICAL NEURAL PROCESSING METHODS.
LFP (LOW FREQUENCY)

Preprocessing

Filtering, energy operator

Filtering, spike detection,
validation

FE, dimensionality
reduction

Power spectrum at certain
bands, time-domain power
and amplitude, PCA,
thresholding

Spike snippet, derivatives
features, time interval between
spikes, PCA, wavelet analysis,
thresholding

Classification, decoding

k-means, template matching, support vector machine

Feedback control

Neural networks, phase locking, proportional-integral-derivative
control, model predictive control, rule-based, thresholding

power efficiency is more relevant
than ever. At the same time, there is
a need for an increasing number of
independent stimulating channels
to accommodate a large number of
stimulating sites to achieve a larger
spatial resolution. In applications like
retinal implants, several hundred or
even a thousand stimulation channels are implemented [18]. Due to

38	

ACTION POTENTIAL
(HIGH FREQUENCY)

PROCESSING STEPS

S P R I N G 2 0 2 0	

the high number of stimulating channels, the overall size of the stimulator increases at the expense of its
safety (postsurgery trauma, risk of
infection, and charge accumulation).
These three requirements-power
efficiency, multichannel operation, and safety-are not trivial to
accomplish simultaneously. In the
rest of this section, we look at the

IEEE SOLID-STATE CIRCUITS MAGAZINE	

combination of power efficiency and
safety of high-density multichannel
neural stimulators.
To be able to drive every electrode
with the right amount of charge
(density), each electrode needs to
be driven independently. Traditionally, the driver circuits of these electrodes are operated from a single
high-voltage supply [17], [18], degrading the overall power efficiency as
not all electrodes develop the same
voltage; as a consequence, a lot of
voltage headroom is being wasted.
Therefore, the best power efficiency
of multichannel stimulator circuits
cannot be achieved by driving every
electrode from its own (current or
voltage) driver circuit but rather by
using an ultrahigh-frequency (UHF)
pulse-based technique that builds up
the right amount of charge at every
electrode via rapid (e.g., 1-ns duration) current pulses [19].
IEEE Solid-States Circuits Magazine - Spring 2020

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