IEEE Solid-States Circuits Magazine - Spring 2020 - 50

w1 (t)
D Q

DQ

D Q

DQ

fs
w2 (t)

y [n ]

+

fs
x (t )
...
...
wM (t )
DQ

DQ
fs

Readout Circuit (×M )

M-Phases Ring Oscillator

FIGURE 5: The practical implementation of an open-loop ring-oscillator VCO-based ADC with
multiphase readout.

φ = ∫(ω0 + kVCOx(t ))dt
x (t )

φ (t )

φq [n ]

y (n )

	
n

n
fs

x (t )

VCO

nTs

#- 3

x (x)dx + q [n],	
(2)
z q [n] = ~ 0 nTs + k VCO

	 y [n] = zq [n] - zq [n - 1](3)

t

t

phase (see Figure 6) in a way that
resembles the equations of a multibit, first-order delta-sigma modulator [14], [32]. In Figure 6, a VCO with
conversion gain k VCO is modulated in
frequency by the input signal x (t) .
The phase of the VCO, z (t), has a linearly growing component due to the
rest angular frequency ~ 0 (the dotted
line in Figure 6) and a slowly varying
additive component representing the
integral of x (t) . The physical output of the VCO, however, is a square
signal (or a set of square signals in a
ring oscillator); therefore, only phase
advancement in discrete steps can be
noticed, coincident with the square
signal edges. The VCO output is then
sampled into a discrete sequence by a
flip-flop with sampling period Ts . The
quantized and sampled phase z q [n]
can therefore be modeled by adding a
quantization noise component q [n] .
The effect of the exclusive-OR (XOR)
gates in Figure 5 is equivalent to
computing the first-order difference
of z q [n] . Hence, the following equations are obtained:

φq [n ]

φ (t )

1-z-1

y (n )

Quantizer

= q [n] - q [n - 1] + ~ 0 Ts
+ k VCO

nTs

#(n - 1)T x (x) dx.

	

(4)

s

As can be seen, the output sequence
y [n] contains the input signal x [t]
averaged across each sampling period
as well as the quantization noise that
is, indeed, first-order shaped.

FIGURE 6: The phase-referenced model of a VCO-based ADC.

VCO-Based Analog-to-Digital
-Conversion: Diving Deeper

power-efficient way. Fortunately, as
a practical implementation, the circuit
in Figure 5 facilitates a very easy way
to measure the count increment without the need to reset the counter at
every sampling clock cycle. Thanks to
modulo arithmetic, this circuit encodes,
with minimal hardware, the number of
both the rising and the falling edges of
the oscillator in a thermometric code
at every clock instance. And here is the
beauty of VCO-based ADCs: a many-bit,

There are, however, some tricky questions that trigger a deeper dive. For
instance, how does the VCO rest
fre--quency f0 affect the quantization noise? Also, the behavior of
the VCO-based ADC is poorly modeled for large signals, due to discrete tones in the output spectrum,
similar to a first-order delta-sigma
modulator. A different point of view
is obtained by going back to the
basics of pulse-modulation theory

50	

S P R I N G 2 0 2 0	

first-order, noise-shaped sequence is
obtained with only a few digital logic
gates and no op-amps.
Since early VCO-based ADC converters were seen as a lter native
implementations of delta-sigma mo--
dulators, the explanation given for
the functioning of VCO-based ADCs
can also be deduced from common
delta-sigma modulator understanding.
The block diagram in Figure 2 can be
described in terms of the oscillator

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IEEE Solid-States Circuits Magazine - Spring 2020

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