IEEE Solid-States Circuits Magazine - Spring 2022 - 33

lower transconductance in the output
stage, providing lower amplitude,
may be made up for with higher gain
in the amplifier to attain the required
loop gain for oscillation. The fast
transistors available in 40 nm CMOS
allows low-power amplifier A to have
only a small amount of phase delay at
the crystal operating frequency.
The amplifier comprises four current-starved
inverters. Capacitance
of the amplifier internal nodes is
much lower (a handful of fF) than the
capacitance at the Xout pin (~20 pF);
thus, voltage gain may be attained
using a much lower power before the
output transistor. While the inverterbased
amplifier " A " increases noise
in the forward path this noise only
affects the microprocessor clock that
is taken at the input to the gm output
stage. The output of the gm stage
provides energy into the crystal
resonator and therefore the noise is
rejected by the resonator. The radio
phase-locked loop (PLL) has a separate,
low-noise class-A pick off on
Xin, which is enabled in conjunction
with the PLL.
When combined with the speed
provided by a 40-nm process, the
power savings from this architecture
are considerable: the 40 MHz oscillator
starts and sustains oscillation consuming
only 3.6 µW of supply power
while using 20-pF load capacitors on
Xin and Xout (10-pF load capacitance).
For robustness reasons, the oscillator
is operated at a power level higher
than this in the application.
While this oscillator design has
low enough current draw to be left
on while sleeping, driving the clock
tree for digital-flow-based logic at
this frequency would easily exceed
the current budget. Therefore, a
low-power clock divider is placed
adjacent to the oscillator circuit to
generate a lower frequency, and thus
lower power, clock. When transitioning
into sleep mode, the clock for the
network-time counters is switched to
the low-frequency clock in a manner
that maintains the timing precision
of the high-frequency clock. Simultaneously,
the counting increment is
Requiring a second crystal just for sleep timing
adds cost, reduces reliability, and results
in less timing precision.
increased to match the low-frequency
clock. When waking up, the clock
swap is reversed, again maintaining
strict 25-ns precision, thus allowing
a continuation of the precision of the
high-frequency clock even when it
is not available to the counters such
that network time is maintained at
the higher precision.
RF Interference
The battery pack is a cluttered environment
dense with reflective and
absorptive elements, which can
attenuate wireless signals as much
as 80 dB. The attenuated wireless
signal must compete with RF interference,
so high immunity is vital.
Interference can originate inside the
cabin from Wi-Fi and Bluetooth in
infotainment systems or outside the
automobile from typical EMI or malicious
jamming. Automotive companies
test a wide range of proprietary
interference scenarios often referenced
to ISO11452-2 [28]. These
stringent requirements make reuse
of consumer wireless hardware/
software less effective than using
purpose-built hardware to address
the particular needs of WBMS.
Interference resilience can be
improved at all levels of the design
including radio hardware, system
architecture, and the battery pack
itself. The first line of defense is the
battery enclosure, which acts as a Faraday
cage if metal or foil shielding is
used, attenuating interference by up
to 40 dB. Next, adding bulk acoustic
wave/surface acoustic wave filters to
wireless nodes reduces out-of-band
interference. The system/software
architecture also provides protection:
channel-hopping and mesh routing
help avoid degraded channels and
poor-quality radio paths.
The radio transceiver benefits from
high input-power tolerance combined
with superior blocking performance.
Excellent adjacent/alternate channel
rejection, and robust co-channel
performance mitigate in-band
interference. Zero-IF demodulation
directly to dc reduces image leakage
while tight multistage filtering narrows
the frequency range of interference.
Wideband blocker detection is
used to activate a low-gain low-noise
amplifier thereby improving linearity
in the face of large jamming signals.
On the transmit side, a higher power
PA, transmitting at 12 dBm, overpowers
unwanted signals. Single bit and
burst error correction help overcome
duty-cycled interference or interference
near the co-channel limit.
While the WBMS solutions discussed
so far utilize the common
far-field RF approach for wireless,
another approach utilizes near-field
communication [30]. A " bus antenna "
transmission line similar to an inductive
loop is routed throughout the
battery pack with each node located a
few millimeters away. While a 2.4-GHz
carrier frequency is used like the farfield
WBMS system, the devices are
tuned for this short-range communication,
which reduces their ability
to pick up radiation from interferers
and jammers. This system is intended
to be used with one wireless node
per cell, so a single pack would have
hundreds of nodes. One downside
of the approach is that due to the
bus antenna, it does not completely
remove the data wiring in the pack.
Functionally Safe
When operated in a passenger car,
BMS must be compliant to automotive
safety standards like ISO26262 [29].
Systems are classified by Automotive
Safety Integrity Level (ASIL) with
ASIL-D the highest level of functional
safety. A key aspect of functionally
safe design is to be able to detect
faults and reliably notify the system.
For the monitoring IC, accurate
IEEE SOLID-STATE CIRCUITS MAGAZINE
SPRING 2022
33
IEEE Solid-States Circuits Magazine - Spring 2022

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