IEEE Solid-States Circuits Magazine - Spring 2022 - 48

(3) separates targets in the frequency
domain as a function of distance,
reducing dynamic range requirements:
near and far-away objects
with large size differences (thus, signal
power) are easily separated, and
strong reflections from large nearby
objects and antenna coupling are easily
removed with filtering.
Radar circuit architectures exploit
the potential of FMCW, maximally
leveraging the strengths of CMOS technologies
through innovative design.
The RF-to-baseband bandwidth compression
/tTchirp
allows for resolution
scaling through the gradual expansion
of the baseband bandwidth and
radar digital processing capabilities
boosted with nm CMOS technologies.
This is appreciated with help of (2) for
the maximum unambiguous range
using (5). Increasing the modulation
bandwidth B increases the range resolution,
ultimately limited by band
allocation, while reducing the chirp
duration improves velocity detection,
limited by the wavelength and safetydefined
cycle time. To satisfy the constant
maximum range, the Nyquist
frequency needs to keep increasing,
which links to CMOS ADC evolution.
For example, completely filling
the 76-77-GHz long-range band to
achieve a 15-cm range resolution at
250 m with an 8.2-µs chirp duration
translates to the 200-MHz baseband,
which is 10 times more compared to
what can be offered in today's product
platforms [3].
Another important aspect is that
it has been made possible to achieve
breakthrough output power, noise
figure, and phase noise with low
power and area. This enabled high
sensitivity and broke the SiGe versus
CMOS technology partitioning
barriers between the front end and
baseband, allowing large-scale integration
and adding more benefits.
The architectural and performance
footprints of highly integrated FMCW
radar architectures [3], [4] driving
market deployment today are
reviewed next and used as pivoting
point in the following sections.
RFCMOS offers power efficiency
advantages compared to SiGe HBT
technologies for the automotive
radar link budget. Figure 4(a) shows
that
the NMOS in 40- and 28-nm
CMOS achieves a similar peak FT and
FMAX as the SiGe HBT devices used in
production for mm-wave infrastructure
products [5] at a much lower
current density. Noise performance
has improved similarly. Geometric
tailoring allows the optimization
of mm-wave performance at lower
current densities against electromigration
with partitioning and
staggered connections [5], [6], while
the transformer and power splitter/
combiner geometries in Figure 4(b)
perform impedance transformations
and matching, simultaneously reducing
losses and process variability
impact, with profound benefits in the
output power or noise figure (NF).
Process variability, automotive
temperature ranges, reliability, lifetime
operation, and built-in-self-tests
(BISTs) for functional safety and
supply isolation constrain transmit
lineup power efficiency compared to
the state-of-the-art figures reported
in literature for power amplifiers [7].
This makes attention to signal losses
critical. To achieve, for example, the
required 12-dBm output power per
transmitter at the antenna port at
high temperatures with NF 13dB1
at ADC output in 40-nm CMOS, the
redundancy of constant envelope FM
modulation is used, which allows saturated
voltage swings for better tolerance
to process variations, amplitude
noise, and nonlinearity. Capacitance
neutralization [7] reduces the impact
from transistor capacitances, while
on-die power combiners and digital
calibrations offer power efficiency
and precision phase control down
to a couple of degrees, exploiting
smaller devices. Passive mixers with
linear MOS switches combined with
linear baseband amplifiers achieve
high linearity to handle strong reflections,
and noise is lowered with highresolution
ADCs.
The ADC challenge in Figure 5 is
to achieve low-power weak-signal
450
400
350
300
250
200
150
100
50
40 nm
28 nm
SiGe-HBT
Source
FMAX
Gate
FT
10-6
10-4
ID or IC (A/µm)
(a)
Bulk
[US10381447]
Retraction
10-2
Drain
12
10
8
6
4
2
Matching and Impedance
Transformation With Transformer
[7]
Matching With LCL Lines
70 72.5 75 77.5 80 82.5 85
Frequency (GHz)
(b)
FIGURE 4: Examples of technology tailoring for active (a) and passive devices (b) in RFCMOS. LCL: inductor capacitor inductor.
48
SPRING 2022
IEEE SOLID-STATE CIRCUITS MAGAZINE
FT, FMAX (GHz)
#via's
Pout (dBm)
IEEE Solid-States Circuits Magazine - Spring 2022

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