IEEE Solid-States Circuits Magazine - Spring 2022 - 78

This means that the amplification is
reduced, and we have Ab < 1.
As a reminder, for all of the kinds
of latching, we have four types for
which there are the typical voltage
transfer characteristics (VTCs),
shown in Figure 2. At the positive
feedback, if we constantly increase
the amplification, we have a faster
comparator [3] (i.e., more
DD ),VV /oi
similar to Figure 2(a) and 2(b). On
the other hand, if the numbers of the
poles are equal with the zeros, the
width of the output signal is infinite,
such as in Figure 2(c). (The system
is an oscillator.) Also, the capacitor
between the input and output terminals
can create a zero = 0 and a pole,
which helps us to create an oscillator.
Figure 2(d) illustrates the hysteresis
in a latch, and the amplification
could be useful for the speed.
For instance, Figure 3 illustrates
how we could create a circuit in this
analog planet that either has hysteresis,
such as a Schmitt trigger, or
does not have hysteresis, such as a
comparator. Accordingly, the system
has the amplification and positive
feedback by the operational amplifier.
Equations (5) and (6) could be
used to calculate the points of transactions
at the hysteresis in a noninverting
latch:
V
V
T1 =+ ) VDD
R
R
T2 =- ) VDD
R
R
1
2
1
2
.
(5)
(6)
Also, (7) and (8) could be used to
calculate the points of transactions at
the hysteresis in an inverting latch:
V =+T1
V =-T2
RR
R
+
RR
R
+
43
4
43
4
) VDD
) VDD
.
(7)
(8)
However, if we do not need a hysteresis,
we could change the values
of R2
or R4 to be a short circuit or
0 Ω; then, the Schmitt trigger is replaced
with a comparator.
Simple Latch
VDD
RL
Vout
VDD
RL
Vout
Vin
+
A
β
(b)
Vout
gm
Vin
.vgs
ro
Co
RL
CL
Vout
Positive Feedback Without
Amplification
Figure 4(a) illustrates a common-source
amplifier design and capacitor between
the drain and gate terminals, and it is
latched as well. However, Figure 4(b)
has a source follower amplifier and
the positive feedback at the most difficult
state (self-bias). Briefly, the output
signal in Figure 4(b) is not latched for
a long time, 200 s. Subsequently, we
could calculate the stability.
In Figure 5, the feedback is posiNot
Ideal
Vss
(a)
2
× IS
CS
rS
tive, and the closed-loop gain is
AV /AA1 b=-^h,
in which A < 1,
and b < 1. Therefore, Ab is always
less than one. CF
is between the in(c)
FIGURE
1: (a) A simple latch circuit. (b) A block diagram of the feedback (shunt-shunt).
(c) A simplified small-signal equivalent model for a transfer function.
put and output. (It is in series in the
circuit.) In addition, we have one zero
= 0 and one pole at
FF
-
-1 /RC . The
open-loop function has two zeros = 0
and two poles = /RC1 FF
. Due to the
Vo
Vo
Vo
Vo
∆vo
∆vi
∆vo
∆vi
Vi
VT1
VT2
VT1
Vi
Vin = 0
Vi
VT2
Vd
∆vo
∆vi
Vi
VT1
(a)
(b)
(c)
(d)
FIGURE 2: The typical VTCs of the types of latching: (a) off/on, (b) without hysteresis, (c) without input, and (d) with hysteresis.
78
SPRING 2022
IEEE SOLID-STATE CIRCUITS MAGAZINE
IEEE Solid-States Circuits Magazine - Spring 2022

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