IEEE Solid-States Circuits Magazine - Spring 2023 - 24

DEEP THOUGHTS ABOUT BREAKING ABSTRACTIONS
A block diagram is an abstraction, a metaphor, a simplified construct that allows you to divide
complex systems into mentally convenient pieces for sharing ideas or solving problems.
Abstractions are the foundation of digital design and computer science, but as our colleagues
in the advanced computing field are discovering, they come at a high price. If you become
wedded to an abstraction, you pay a severe performance and efficiency penalty [S1]. In our
field, the performance penalty for following a block diagram literally is usually not that great.
However, it's nice to know that merging analog functions, i.e., breaking abstractions, is not just
the self-indulgent whim of the angry loners we call gurus. No, it is a genuine, up-to-the-minute
trend on the lips of all the big-picture thinkers. Yup, that's us: bleeding edge!
Reference
[S1] Y. Shi et al., " Resource-efficient quantum computing by breaking abstractions, " Proc. IEEE, vol. 108,
no. 8, pp. 1353-1370, Aug. 2020, doi: 10.1109/JPROC.2020.2994765.
ing synergy are exactly what merged
functionality is all about. Once
your mind is in the habit of looking
outside the box for opportunities,
you may well find something more
momentous than just the elimination
of a comparator. Such discoveries
will not happen, however, if you
are sleep-walking through a placeand-route
design based on the block
diagram. For an even pithier viewpoint,
see " Deep Thoughts About
Breaking Abstractions. "
The real truth: If you're still
The performance seen in Figure 7(c)
is much better than you could do
with a comparator:
■ The output is continuous (i.e., no
abrupt jumps) even with huge
offsets.
■ It is a very efficient use of gain: to
get the same accuracy around 0,
much more gain would be required
from the comparator.
■ The gain is created in tight, local
loops within each enhanced
follower, which is always a good
thing for stability and simulation
confidence.
This circuit breaks my rule
about positive feedback (see
" Open-Loop Comparators " ),
but that's OK. There is no
digital output, so there is
no danger of invalid logic
levels. Plus,
the perfora
comparator completely, you won't
reduce power consumption enough
to save the planet. Sure, there may
be marginal advantages in noise,
parasitics, or speed for designs with
fewer devices or fewer nodes, but
those benefits-if there are any-
are only apparent on a case-by-case
basis. So why all the fuss?
Feeble argument #1: Most circuit
You can tinker
with transistors
for hours,
mance is not hypercritically
dependent on gain
like an open-loop comparator
would be. If
the loop gain of this
circuit gets reduced for
some reason, the tip of the absolute
value V shape will be a little less
sharp. No biggie.
Why Bother?
What's the big deal about merging
functionality like this? Nobody
cares-or is even likely to
notice-if you eliminate a few transistors.
In the event that you remove
coming up with
wonderful new
configurations,
many of them
abject failures
but a few-just
a few-that are
absolutely brilliant.
failures stem from lack of attention.
You copy a handful of cells
that somebody else designed, stitch
them together, and go home early.
You may never get
around to considering
yield, PSRR, interface
issues, aging, or fault
conditions because you
never really invest that
much intellectual capital
in such a quickie design.
Doing something creative
will cure that complacency.
New territory automatically
puts the brain on high alert.
You don't take your hands off
the wheel on a strange road,
right, Elon? You will check all the details,
and hence, you are actually less
likely to make a mistake. Ironically,
being creative can reduce risk...if it's
done right.
Feeble argument #2: Seeing the
big picture and exploiting synergy
are the two cornerstones of any real
breakthrough in technology. But
seeing the big picture and exploitreading
this far into the column,
you know why we do this: because
it's fun! You can tinker with transistors
for hours, coming up with wonderful
new configurations, many of
them abject failures but a few-just
a few-that are absolutely brilliant.
It is this supremely gratifying act
of creation that is unique to analog
circuit design. If we were designing
something else, like bridges,
for example, we could certainly not
afford to be so creative. Nor could
we check the validity of our invention
so quickly and thoroughly as
we can with modern circuit simulators.
No, the real reasons to merge
functionality are because it engages
us, it stimulates our creativity,
and it's fun.
So, put the block diagram aside
and get creative. But for heaven's
sake, drive safely!
References
[1] A. P. Brokaw,
" Parallel analog-to-digital
converter, " U.S. Patent 4 270 118, May 26,
1981.
[2] C. Mangelsdorf, " The strangest ADC ever
built [Shop Talk: What You Didn't Learn
in School], " IEEE Solid-State Circuits Mag.,
vol. 14, no. 3, pp. 16-23, Summer 2022,
doi: 10.1109/MSSC.2022.3184440.
[3] B. Razavi, " The design of a low-voltage
bandgap reference [The Analog Mind], "
IEEE Solid-State Circuits Mag., vol. 13, no.
3, pp. 6-16, Summer 2021, doi: 10.1109/
MSSC.2021.3088963.
[4] " Schmitt trigger. " Wikipedia. Accessed:
May 2, 2023. [Online]. Available: https://
en.wikipedia.org/wiki/Schmitt_trigger
[5] C. Moreland, F. Murden, M. Elliott, J.
Young, M. Hensley, and R. Stop, " A 14bit
100-Msample/s
IEEE J. Solid-State Circuits, vol. 35, no.
12, pp. 1791-1798, Dec. 2000, doi:
10.1109/4.890292.
subranging ADC, "
24
SPRING 2023
IEEE SOLID-STATE CIRCUITS MAGAZINE

https://en.wikipedia.org/wiki/Schmitt_trigger https://en.wikipedia.org/wiki/Schmitt_trigger

IEEE Solid-States Circuits Magazine - Spring 2023

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