IEEE Solid-States Circuits Magazine - Summer 2019 - 11

find the Norton equivalent of I 1 and
the two resistors connected to it, recognizing that I 1 is halved. Reducing
the circuit to that in Figure 2(c), we
continue to merge current sources
and resistors and replace them with
their Norton equivalents. Illustrated
in Figure 2(d), the final result reveals
that the circuit provides a current
equal to a binary-weighted sum of
the unit current sources and exhibits an output resistance equal to 2R.
As such, the network can operate as
a DAC. In that environment, I 1 -I 5 are
controlled by a digital binary input,
with I 1 acting as the least-significant
bit (LSB) and I 5 as the most-significant bit (MSB) [Figure 3(a)].
The principal advantage of the
R-2R DAC is its compact design; in
the 5-b example, it requires only five
unit current sources and 11 unit resistors (each equal to R). By comparison, a 5-b segmented (also called
thermometric) DAC would employ
31 unit current sources.
The R-2R DAC, however, suffers
from two drawbacks. First, it necessitates stringent matching among
the current sources for high-resolution applications. This can be seen
by assuming that, in Figure 3(a), the
digital input, D 5 f D 1, goes from
01111 to 10000. We call this change
the MSB transition. Consequently,
I 1 -I 4 turn off, while I 5 turns on, and
the output current, I out, increases by
1 LSB only if
I
I 5 = I 4 + 3 + I 2 + I 1 + 1LSB.
2
4
8
16

(1)

While fairly relaxed in this 5-b example,
such a matching condition becomes
difficult to meet for resolutions greater
than 7 or 8 b. If, due to mismatches,
the MSB current source happens to be
slightly less than the weighted sum of
the remaining current sources, I out falls
as D in goes from 011f 1 to 10 f 0,
creating a nonmonotonic characteristic [Figure  3(b)]. By contrast, a
segmented architecture is free from
nonmonotonicity.
T h e s e con d d r aw b ac k of t h e
R-2R DAC relates to the voltage
drop incurred by the resistor lad-

I
Vout = -2R c I 5 + I 4 + 3 + I 2 + I 1 m,
2
4
8
16
(4)

der. As shown by Figure 3(a), with
D 5 D 4 f D 1 = 11f 1, we have
3I
Vout - V1 = R c I 4 + 3 + 7I 2 + 15I 1 m
2
2
4
8
(2)
= 49 RI u,
16

we note that a current entering different nodes experiences different
weighting factors as it translates to
Vout . Bearing this property in mind,
we consider a radio-frequency (RF)
mixer that generates an output current and follow it by such a ladder
so as to realize a programmable gain.
Illustrated in Figure 4 [2], the circuit
senses an RF input, V RF, converts it
to current, and mixes the result with
the local oscillator (LO) signal. The
downconverted current, I out, is then
injected into only one of the nodes
of an R-2R ladder. From (4), we have

(3)

where I u denotes the nominal value
of each current source. This drop reduces the voltage headroom for I 1
and creates a mismatch between I 5
and I 1 due to channel-length modulation. The other current sources experience similar effects.
The simplified topology in Figure  2(d) points to another possible
application of R-2R ladders. Writing

Vout

Iout

R

I5

R

2R

D5
MSB

I4

R

2R

I3

R

2R

D4

I2

R

D3

V1
-

D2

D1
LSB

(a)

Iout
If I5 <

01111 10000
(b)

I1

I4
I
I
I
+ 3 + 2 + 1
2
4
8
16

Din

FIGURE 3: (a) The problem of voltage drop along the ladder and (b) the effect of mismatch
between the MSB current source and LSB current source.

VDD
RF
Mixer

VRF
VLO
Iout

R

R

R

R

2R

2R

2R

R

S1

Vout

FIGURE 4: The use of an R-2R ladder in an RF mixer.

IEEE SOLID-STATE CIRCUITS MAGAZINE

SU M M E R 2 0 19

11
IEEE Solid-States Circuits Magazine - Summer 2019

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