IEEE Solid-States Circuits Magazine - Summer 2019 - 25

fT/x (t/x) =

2
t
J
e - x ! ^v DAC - v IDh/VDD p t N
- O
K e -f
x
2
V
v
/
DD
n
2
K
O.
J v DAC - v ID N O
2r vn K
K
O
VDD
O
VDD K 1 ! erf KOO
K
2
v
n
K
O
K
O
VDD
L
PP
L
The ! term is positive if we condition on a negative residual voltage
[e.g., the Figure 7(a) MSB decision]
and negative if we condition on a
positive residual voltage [e.g., the
Figure 7(a) second MSB decision]. Distributions f T/x (t/x) for the MSB, second MSB, and LSB regeneration times
are shown in Figure 7(c) and (d).
Now let's consider what it means to
run out of time and in how many different ways this can actually happen.
For the 3-b example from Figure 7,
this can happen in exactly five ways,
as shown in Figure 8. The first case is
that we run out of time during the MSB
decision. This would lead to an ADC
output code of X00. The second case is
that the MSB regeneration finishes, but
we run out of time during the fixed delay that follows, leading to an output
code of 100. The third case is that the
second MSB regeneration starts but
doesn't finish, leading to an output
code of 1X0. The fourth case is that
we run out of time during the second
fixed delay. For this case, the two examples in Figure 7(a) and (b) produce
different output codes because of the
decision error in Figure 7(b). The fifth
case is that we run out of time on the
LSB, leading to an X in that position.
Finally, if the conversion finishes on
time, then the ADC output code takes
on the same value it would have for
thermal noise in isolation.
How can we calculate the probability of each of these six possible outcomes? First, it's important to see that
they can all be expressed using sums
of independent random variables
(regeneration times). For example,
the probability of running out of time
during the second MSB regeneration
(case 3) is

P (t reg,1 + TFIX1Ts + t reg,1 + TFIX + t reg,22Ts).
In other words, we're interested in the
probability that there's enough time

ure 9. The event t reg,1 + TFIX + t reg,2 2 Ts
is the hashed green area. What we really want is the probability of the intersection of this event and the event
t reg,1 + TFIX 1 Ts . The event of interest
is enclosed in the black trapezoid,

for MSB regeneration and the first
fixed delay but not enough for those
two plus the second MSB regeneration.
We can also visualize this event in the
sample space of independent random
variables t reg,1 and t reg,2, shown in Fig-

Probability Distribution of Regeneration Time With Noise
To calculate the probability density function (PDF) of regeneration time, we first calculate the
cumulative distribution function (CDF) from the condition t reg = x ln (VDD /|v |) 1 t, where t
is the function input and the noisy residual is v = v DAC - v ID - v n ~ N ( n, v n). Here, we describe each residual as a normally distributed voltage with mean n = v DAC - v ID .
To get rid of the absolute value, we condition on v 2 0 or v 1 0 (residual either above or
below the comparator threshold). For v 2 0, we find the CDF for t reg using the equivalent voltage condition v 2 VDD e-t / x,
Freg ^t v 2 0h = 1- Fv ` VDD e - x v 2 0 j =
t

1- erf e

t

VDD e - x - n o
2 vn

1- erf c -

n

2 vn

m

,

where Fv is the CDF for the positive side of a Gaussian truncated at v = 0.
We find the PDFs for each side by taking the derivative of the respective CDFs,
2

f VDD e

- t
x

-n p

f VDD e

- t
x

+n p

t

freg ^t | v 2 0h =

x
2 vn
e2VDD
2r v n x 1- erf c - n m
2 vn

freg ^t |v 1 0h =

x
2 vn
e2VDD
.
n
2r v n x 1+ erf c m
2 vn

and
2

t

Run Out of
Ts Time On...

0
treg,1
treg,1

TFIX

treg,1 TFIX

treg,2
treg,2

treg,1 TFIX
treg,1 TFIX

treg,2

TFIX

treg,1 TFIX

treg,2

TFIX

TFIX
treg,3
treg,3

ADC Output Code

MSB

X00

X00

First Fixed Delay

100

100

Second MSB

1X0

1X0

Second Fixed Delay 100

110

LSB

10X

11X

On Time

101

110

(b)

(c)

(a)

FIGURE 8: For the 3-b example, there are exactly five different ways in which the ADC can
run out of time, and each is associated with a particular code error. The two ADC output code
columns correspond (b) to Figure 7(a) and (c) to Figure 7(b).

IEEE SOLID-STATE CIRCUITS MAGAZINE

SU M M E R 2 0 19

25
IEEE Solid-States Circuits Magazine - Summer 2019

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