IEEE Solid-States Circuits Magazine - Summer 2019 - 72

state-of-the-art accelerators executing the popular Secure Hash Algorithm 2 consume energy greater than
but still comparable to AES.

Conclusions
In this article, the state of the art in
primitives for hardware security was
reviewed, beginning with the fundamentals and then moving on to silicon solutions for tightly energy- and
area-constrained systems. A performance scaling trend perspective was
provided by introducing the HWsecdb
and the PUFdb maintained by the
Green IC group of the Department of
Electrical and Computer Engineering
at the National University of Singapore. The analysis of PUFs and RNGs
revealed relentless (exponential) improvements in area and energy efficiency due to the research effort of
our community. In weak PUFs, it was
observed that the actual area and energy cost are dictated mostly by the
ECC and, thus, the PUF native stability. The most promising approaches
are mostly or fully digital in view of
their amenability for technology scaling and automated design. The state
of the art in strong PUFs is less mature and suffers from significantly
worse energy and throughput, leaving considerable room for further innovation. Similar considerations hold
for TRNGs, whose area and energy efficiency are exponentially improving,
especially in mostly and fully digital
solutions (e.g., coupled-ring-oscillator-based chaotic maps).
As another important trend, innovative solutions for lightweight privatekey cryptography with subpicojoule/
bit energy are being investigated.
Area- and energy-efficient solutions
adding flexibility for post-silicon geographical differentiation and future
upgradeability are also being investigated. The currently large energy cost
of flexibility leaves, again, interesting
room for further innovation. Publickey cryptography has been shown
to entail consumption three to six
orders of magnitude larger than that
of private-key cryptography, which
mandates fundamental rethinking of

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SU M M E R 2 0 19

existing security protocols. In the end,
understanding the energy/area implications in tightly constrained systems
is crucial not only for the design of
SoCs but also for the proper choice of
security protocols. Tighter interaction
between chip design and protocols is
demanded for next-generation IoT devices to simultaneously assure a targeted level of security at a minimum
energy/area cost while enabling flexibility for future hardware patching.

Acknowledgments
The support of the Singapore National Research Foundation (SOCure
grant NRF2018NCR-NCR002-0001) is
acknowledged, as well the very valuable inputs and insights from Sachin
Taneja and Anastacia Alvarez from
the Green IC group of the Department of Electrical and Computer Engineering at the National University
of Singapore.

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IEEE SOLID-STATE CIRCUITS MAGAZINE

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