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About the Authors
Vivienne Sze (sze@mit.edu) is an
associate professor in the Electrical
Engineering and Computer Science
Department, Massachusetts Institute of Technology. She is a recipient
or corecipient of various awards, including the AFOSR and DARPA Young
Faculty Award; the Edgerton Faculty
Award; faculty awards from Google,
Facebook, and Qualcomm; the Symposium on VLSI Circuits Best Student
Paper Award; the IEEE Custom Integrated Circuits Conference Outstanding Invited Paper Award; and the IEEE
Micro Top Picks Award. Her research
interests include computing systems
that enable energy-efficient machine
learning, computer vision, and video
compression/processing for a wide
range of applications, including autonomous navigation, digital health, and
the internet of things. She is a Senior
Member of the IEEE.
Yu-Hsin Chen (allenhsin@alum
.mit.edu) received his B.S. degree in
electrical engineering from National
Taiwan University, Taipei, in 2009 and
his M.S. and Ph.D. degrees in electrical engineering and computer science
from the Massachusetts Institute of
Technology (MIT), Cambridge, in 2013
and 2018, respectively. He is currently
a research scientist at Facebook, focusing on hardware/software codesign to
enable on-device artificial intelligence
for augmented/virtual reality systems. Previously, he was a research
scientist in Nvidia's Architecture Research Group. He was the recipient
of the 2018 Jin-Au Kong Outstanding
Doctoral Thesis Prize in Electrical Engineering at MIT, 2015 Nvidia Graduate Fellowship, 2015 ADI Outstanding
Student Designer Award, and 2017 IEEE

SSCS Predoctoral Achievement Award.
His work on the dataflows for CNN accelerators was selected as one of the
Top Picks in Computer Architecture in
2016. He is a Member of the IEEE.
Tien-Ju Yang (tjy@mit.edu) received
his B.S. degree in electrical engineering in 2010 and his M.S. degree in
electronics engineering in 2012 from
National Taiwan University. He is currently a Ph.D. degree candidate in
electrical engineering and computer
science at the Massachusetts Institute
of Technology, working on efficient
deep neural network design. His research interests include the areas of
deep learning, computer vision, machine learning, image/video processing, and very-large-scale integration
system design. He won first place in
the 2011 National Taiwan University
Innovation Contest. He also cotaught
a tutorial, Efficient Image Processing
With Deep Neural Networks, at the
2019 IEEE International Conference
on Image Processing. He is a Student
Member of the IEEE.
Joel S. Emer (jsemer@mit.edu) is a
senior distinguished research scientist
with Nvidia's Architecture Research
Group and a Professor of the Practice at the Massachusetts Institute of
Technology. He was with Intel, where
he was an Intel fellow and the director
of microarchitecture research. At Intel, he led the VSSAD Group, of which
he had previously been a member at
Compaq and Digital Equipment Corporation. He has made architectural
contributions to a number of VAX, Alpha, and X86 processors and has contributed to the quantitative approach
to processor performance evaluation,
simultaneous multithreading technology, processor reliability analysis,
cache organization, and spatial architectures for deep learning. He is a
Fellow of ACM and member of the National Academy of Engineering. He received the Eckert-Mauchly Award and
ECE alumni awards from Purdue University and the University of Illinois.
He has had six papers selected for the
IEEE Micro's Top Picks in Computer Architecture. He is a Fellow of the IEEE.


	 IEEE SOLID-STATE CIRCUITS MAGAZINE	

SU M M E R 2 0 2 0	

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https://www.nvidia.com/en-us/desing-visualization/nvlink-bridges/ https://www.nvidia.com/en-us/desing-visualization/nvlink-bridges/ https://ai.googleblog.com/2018/04/introducing-cvpr-2018-on-device-visual.html https://ai.googleblog.com/2018/04/introducing-cvpr-2018-on-device-visual.html https://ai.googleblog.com/2018/04/introducing-cvpr-2018-on-device-visual.html
IEEE Solid-States Circuits Magazine - Summer 2020

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