IEEE Solid-States Circuits Magazine - Summer 2021 - 42

cancelation under the ideal bias [11].
In yet another twist, a source follower
can be combined with a common-gate
stage, resulting in a useful amplifier
configuration (see Figure 23), which
has been found by systematically generating
graphs consisting of two transconductance
stages [2].
M1
M2
Vref
FIGURE 25: A constant bias-voltage
generator (M1 and M2 must have different
threshold voltages Vth1 ≠ Vth2) [14].
Ibias
M2
K · (W/L)
Vptat
M1
(W/L)
FIGURE 26: A proportional-to-absolutetemperature
(PTAT) voltage generator
if M1 and M2 are kept in subthreshold
operation [15].
Vbias1
Vp
Vn
Biasing Circuits
The generation of a bias voltage is a
task that is often encountered in analog
circuit design. When the requirements
on stability are moderate, a
simple configuration, as displayed
in Figure 24, might be sufficient. A
surprisingly stable voltage reference
can be constructed from two MOSFETs
with different threshold voltages,
as demonstrated in Figure 25.
Occasionally, a bias voltage with a
well-defined proportionality to temperature
is needed, for example, in
temperature-sensor circuits. This effect
can be achieved by a PTAT voltage
generator like the one depicted
in Figure 26. Sometimes,
circuits
FIGURE 30: The varactor (the capacitance
between Vp and Vn depends on the bias voltage
Vbias) is often used in voltage-controlled
oscillators. In most technologies, the NMOS
can be put inside the n-well so that the
varactor works in accumulation, providing
an optimized tuning range and high Q [19].
M1
M2
are based on obscure second-order
effects, like charge trapping in the
Si-SiO2 interface traps, which are
used in the clocked circuit displayed
in Figure 27 and can create pA-currents
in an area-efficient manner.
Diverse Circuit Elements
The various operating modes of a
MOSFET can be utilized differently
and lead to practical circuit elements.
The cross-coupled differential pair
(see Figures 28 and 29) synthesizes
a negative resistance, which can cancel
losses, for example, in oscillators
Vbias
Vp
M M2
1
Vn
Ibias
FIGURE 28: Two transistors with cross-couVclk
M1
pling
form a negative resistance between
Vp and Vn and are mainly employed in
oscillators and comparators. As in Figure 8,
the bias-current source can be replaced by
a fixed potential.
Vbias2
M2
Vbias
Iout
Vp
FIGURE 27: This pA current source is based
on the periodic filling and flushing of Si-
SiO2 interface traps by alternating M1 between
accumulation and inversion (through
the proper choice of Vbias1 and Vbias2 and the
switching levels of Vclk). It can operate with
reasonably high clock frequencies and still
create tiny currents [16].
42 SUMMER 2021
Vp
Vn
FIGURE 29: This circuit is a low-voltage
version of Figure 28, where the body controls
the MOSFET, avoiding the significant
VGS drop at Vp and Vn [18].
IEEE SOLID-STATE CIRCUITS MAGAZINE
M1
FIGURE 32: The antiparallel MOSFET capacitors
make the differential capacitance more
linear and symmetrical. As in Figure 30, an
NMOS in n-well is an option.
Vn
M1
M2
Vbias
M2
Vp
M2
M1
Vn
FIGURE 31: The antiparallel diodes can
be employed for many things, for example,
voltage clamping.

IEEE Solid-States Circuits Magazine - Summer 2021

Table of Contents for the Digital Edition of IEEE Solid-States Circuits Magazine - Summer 2021

Contents
IEEE Solid-States Circuits Magazine - Summer 2021 - Cover1
IEEE Solid-States Circuits Magazine - Summer 2021 - Cover2
IEEE Solid-States Circuits Magazine - Summer 2021 - Contents
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