IEEE Solid-States Circuits Magazine - Summer 2023 - 72

Illustrated in Figure 17(a) is a 900-MHz
subsampling mixer reported in 1993
[43] achieving a third-order intercept
point of +27 dBm and an NF
of 18 dB. Figure 17(b) shows a
900-MHz inverter-based LNA with
NF = 2.2 dB [44]. A cascode LNA structure
using inductive degeneration
had been reported in MESFET technology
in 1993 [45] [Figure 17(c)]. A
CMOS counterpart followed in 1996
[46] [Figure 17(d)]. Another example
was reported in [28].
Low-noise LC voltage-controlled
oscillators (VCOs) were also of great
interest, motivating extensive work
both on their circuit topologies and
on improving the quality factor of
inductors. Figure 18(a) shows a VCO
using pn-junction diodes for tuning
[47]. The phase noise is −116 dBc/Hz
at a 600-kHz offset with a power
consumption of 6 mW. This work
recognizes that inductors reach a
higher Q if their shape approaches a
circle, offering octagonal geometry
as an approximation. Also important
is the authors' observation that the
inner turns of a spiral degrade the Q
due to the skin effect while contributing
little inductance. We follow both
of these principles in today's inductor
designs.
A key development in this decade
was the invention of the MOS varactor
in 1998 [48]. As shown in Figure 19(a),
the device is formed by placing an
NMOS transistor within an n-well
so as to obtain a monotonic capacitance-voltage
(C-V) characteristic [Figure
19(b)]. A key property here is that
the C-V plot scales with the technology
(i.e., the gate oxide thickness),
allowing low-voltage design. This
stands in contrast to the unscalable
behavior of pn-junction varactors.
Other RF building blocks materialFIGURE
21: A CMOS RX from 1995 [50].
ized in CMOS technology as well. In
1994, 1.6-GHz dual-modulus prescalers
were reported [84], and in 1995,
they reached a speed of 1.8 GHz [85].
In 1997, the 2.5-V 1-W PA shown in
Figure 20 was reported [49]. Implemented
in a 0.8-μm process, the
850-MHz prototype exhibits a smallsignal
gain of 30 dB and a power-added
efficiency of 42%. Only the matching
network driven by M1 is off chip.
RF CMOS design has owed a considerable
part of its success to the
extensive device modeling efforts
undertaken in that time period (and
later). The noise behavior of MOS
devices and loss mechanisms in in -
ductors and varactors were among
the critical effects that eventually
lent themselves to accurate models.
The next phase in RF CMOS re -
(a)
(b)
FIGURE 22: A CMOS TX from 1996 [51]. Seq.: sequence.
72 SUMMER 2023
IEEE SOLID-STATE CIRCUITS MAGAZINE
search dealt with system design,
namely, receivers, transmitters, and
synthesizers. Figure 21(a) depicts a
900-MHz RX example employing a
low-IF topology [50] achieving a total
gain of 9.2 dB and an NF of 24 dB.
Figure 22 shows a 900-MHz TX delivering
an output power of +5 dBm
[51]. A 1.8-GHz synthesizer was also
described in [52].
IEEE Solid-States Circuits Magazine - Summer 2023

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