IEEE Solid-States Circuits Magazine - Winter 2022 - 109

which offer analog circuit designers
both benefits and challenges. With the
performance of transistors increasing
and their size decreasing, parasitics are
increasingly predominant contributors
to overall circuit performance. Low supply
voltages favor simple analog subcircuits
and make power supply integrity
critical for first-time-right silicon.
The course began by reviewing the
transistor short-channel-length characteristics
that particularly impact analog
design in nanoscale technologies.
The next lecture presented basic analog
amplifier circuits compatible with
low supply voltages and nanoscale
CMOS technologies. Subsequent lectures
covered references and regulators,
clock distribution, and dynamic
analog circuits. The final two lectures
considered the design of analog-todigital
converters and common pitfalls
when integrating complex analog
intellectual property in nanoscale technologies.
Each lecture included analog
design case studies in technologies
including 28-nm bulk CMOS, 28-nm
fully depleted silicon on insulator,
and 16-nm and 7-nm fin field-effect
transistors (FinFETs). There was also a
focus on step-by-step methodologies
for high-quality power supply integrity,
low-jitter clock distribution, and
good layout practice.
Prof. Tony Chan Carusone, course presenter, talked about analog circuit design in nanoscale
CMOS technologies (<30 nm) at an online course hosted by Hooman Reyhani and the University
of Limerick, Ireland.
The class discussion forum was
actively used by the participants to
collaborate with the homework assignments
and share their findings. The
session recordings provided them the
opportunity to catch up with a missed
lecture as well as to revisit the lecture
content for a second time. The course
organizers thank Mr. John Warner
(http://www.simetrix.co.uk/) for facilitating
access to the latest version of
SIMetrix simulator for the handson
homework assignments using
FinFET models.
The course was a resounding success
and received extremely positive feedback
from the course participants: for example,
" Presenter has excellent knowledge
of analog IC design, and I enjoyed the
delivery clear and considered " ; " Online
is the present and the future... It cuts
the costs and gives 'almost' all the benefits
of a face2face experience " ; " I'm truly
grateful that you are offering this course
and that I found it. " For more information
about future courses, please visit https://
hoomanreyhani.com/.
-Hooman Reyhani
T
CEDA Currents
The following is an updated reprint
from CEDA Currents, October 2021
issue, a publication of the IEEE Council
on Electronic Design Automation
(CEDA). Please send contributions to
Vasilis Pavlidis (v.pavlidis@ieee.com).
Digital Object Identifier 10.1109/MSSC.2021.3127002
Date of current version: 24 January 2022
Congratulations to the 2021
A. Richard Newton Technical
Impact Award in Electronic
Design Automation Recipients
The Newton Award (https://ieee-ceda
.org/awards/richard-newton-technical
-impact-award-electronic-design-auto
mation) annually honors a person or
persons for an outstanding technical
contribution within the scope of EDA,
as evidenced by an article published at
least 10 years before the presentation
of the award. This year John A. Waicukauski,
Eric Lindbloom, Barry K. Rosen,
and Vijay S. Iyengar were selected for
their article " Transition Fault Simulation. "
For more information on this
IEEE SOLID-STATE CIRCUITS MAGAZINE WINTER 2022
109

http://www.simetrix.co.uk/ http://www.hoomanreyhani.com/ http://www.hoomanreyhani.com/ https://ieee-ceda.org/awards/richard-newton-technical-impact-award-electronic-design-automation https://ieee-ceda.org/awards/richard-newton-technical-impact-award-electronic-design-automation

IEEE Solid-States Circuits Magazine - Winter 2022

Table of Contents for the Digital Edition of IEEE Solid-States Circuits Magazine - Winter 2022