IEEE Solid-States Circuits Magazine - Winter 2022 - 27
Preamplifiers
CLK
Comparator Latches
Thermometer Code Detector
Encoder and G-B Converter
(a)
VB
1
Comparator
Latches With
Interpolation
Circuit
Preamplifiers
2
16
Vin VT
Reference Resistors
17
1 27 89 12
119
120
121
122
Thermometer Code Detector
Encoder and G-B Converter
Digital Output
(b)
VSS
(c)
FIGURE 10: (a) The chip photo, (b) conversion architecture, and (c) comparator of the 7-bit, 400-MS/s CMOS ADC [17].
consumer products. In 2002 we succeeded,
developing a 7-bit, 400-MS/s
CMOS ADC with a low-power consumption
of 50 mW [17], which paved
the way for applications to consumer
products.
Figure 10(a)-(c) shows the chip
photo, conversion architecture, and
unit comparator of the ADC. Basically,
it is the same as parallel interpolation
[5], but a low-power CMOS
dynamic comparator is used, and the
interpolation is realized by weighting
the gate width of the input transistors.
As a result, the power consumption
was approximately 10 times
lower than that of other announced
6-or 7-bit ADCs at that time.
The ADC was embedded in fully
one-chip mixed-signal SoCs for the
DVD system shown in Figure 11. All
the DVD functions were integrated into
a single IC [18]. It was the beginning of
an era of mixed-signal SoC [19]-[22].
Figure 12(a) and (b) displays the
DVD's recorder board before and
after SoC development, respectively.
The SoC eliminates many ICs and
components, lowers manufacturing
cost and power consumption, and
increases reliability. The smaller
form factor also allows DVDs to be
installed in Note PC. This series of
SoCs for DVDs shipped a total of
520 million chips and contributed
to IC sales of US$2.5 billion over the
course of nine years.
To improve the testability of analog
and mixed-signal chips, I became
a standardization committee member
of IEEE 1149.4 (1996-1998), and jointly
proposed an IEEE standard with HP to
extend boundary scan technology,
which had been put to practical use in
digital circuits, to analog circuits in
board testing at high-density mountings
[23]. We developed a chip to demonstrate
the analog boundary scan
technology, and the establishment of
IEEE Standard 1149.4 was completed.
The utilization of analog technology
is sometimes effective for
low power consumption. Figure 13(a)
shows
the CMOS image sensor,
which integrates an analog image
127
128
In1+
m1 m2
In1-
In2+
m3 m4
In2-
VDD
Out+
Out-
CPU2
CPU�
System
Controller
VCO
ADC
Front end (FE)
Analog FE
+Digital RC
PRML
Read
Channel Servo
DSP
Gm-C
Filter
Analog
FE
Back End
Pixel
Operation
Processor
AV
Decode
Processor
I/O
Processor
FIGURE 11: A completely one-chip mixed-signal SoC for DVD systems [18]. VCO: voltagecontrolled
oscillator; I/O: input/output; AV: audio and video; PRML: partial response maximum
likelihood; Gm-C: transconductance-capacitance.
IEEE SOLID-STATE CIRCUITS MAGAZINE WINTER 2022
27
7 b, 400 MS/s ADC
IEEE Solid-States Circuits Magazine - Winter 2022
Table of Contents for the Digital Edition of IEEE Solid-States Circuits Magazine - Winter 2022
Contents
IEEE Solid-States Circuits Magazine - Winter 2022 - Cover1
IEEE Solid-States Circuits Magazine - Winter 2022 - Cover2
IEEE Solid-States Circuits Magazine - Winter 2022 - Contents
IEEE Solid-States Circuits Magazine - Winter 2022 - 2
IEEE Solid-States Circuits Magazine - Winter 2022 - 3
IEEE Solid-States Circuits Magazine - Winter 2022 - 4
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IEEE Solid-States Circuits Magazine - Winter 2022 - Cover3
IEEE Solid-States Circuits Magazine - Winter 2022 - Cover4
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