IEEE Solid-States Circuits Magazine - Winter 2022 - 28

compression function [see Figure
13(b)], developed with Prof. Shoji
Kawahito in 1997 [24]. The image sensor
at that time was a charge-coupled
device (CCD), and the image quality
was good, but the power consumption
was large. Then we tried to develop
an image sensor using CMOS, which
was rare at that time, and an analog
image compression circuit using an
analog discrete cosine transform
(DCT) by a switched capacitor filter
circuits, and a variable quantization
device by reference voltage control
of ADCs was integrated to reduce the
power consumption instead of the
conventional power hungry digital
DCT and variable quantization. The
development of chips ahead of such
an era opened the door to the future.
As ADCs can be realized with
low power consumption by CMOS,
it became essential technology to
develop mixed-signal SoCs, which can
integrate difficult analog circuits and
large-scale digital circuits, realizing
a whole complex system on the same
chip. In the development of SoCs, not
only circuit technology but also the
integration of various technologies,
including advanced electronic design
automation (EDA), the combination of
design and manufacturing, and collaboration
with external resources
such as other companies and universities
were required.
In collaboration with established
and start-up EDA companies, we
developed a smart development flow
for mixed-signal SoCs from system
to chip and corresponding EDA [19]-
[22], [25]. This design flow and new
EDA improved design efficiency by
10-50 times compared to before.
With SoC development, it is necessary
to bring together many technologies.
To facilitate cooperation and
collaboration, it is indispensable to
DVD Recorder
SoC: System on a Chip
create a road map clarifying the necessary
technologies and their timing
first. I promoted making Panasonic's
SoC technology development road
map and clarified the role and support
of each development group. The
strategies and structures required
for SoC development are summarized
in [25].
Development of Millimeter-Wave
CMOS Transceivers (2007-2018)
I joined Tokyo Institute of Technology
(Tokyo Tech) as a full professor in
2003, and the most important research
was the development of millimeterwave
(mm-wave) CMOS transceivers.
High-frequency signals, of which
wavelengths are measured in millimeters
at frequencies above 30 GHz,
are called mm-waves and had not
actually been often used prior to the
first decade of the 2000s in commercial
communication systems. Therefore,
the project of the Ministry of
Internal Affairs and Communications
Japan, aiming at the practical application
of mm-wave communication,
started in 2007. To solve the tightness
of wireless communication capacity
in the future, it was necessary to put
mm-wave communications such as
60-GHz bands into practical use, and
to realize ultrahigh-speed wireless
communications of 10-100 Gb/s.
Its core technology is ultrahigh(a)
(b)
FIGURE
12: DVD recorders. (a) The 2000 model (before SoC) and (b) 2003 model (after SoC).
(Source: Panasonic.)
2D DCT
Processor
Sensor
2D DCT
Processor
ADC/Q
FIGURE 13: A CMOS image sensor embedding an analog image compression function [24].
28 WINTER 2022
IEEE SOLID-STATE CIRCUITS MAGAZINE
speed transceiver LSI. From Shannon's
theorem, transmission speed D
is expressed D = N times BW. Here, N
is the number of bits per symbol, and
BW is the signal BW. The 60-GHz band
can be bundled with four channels
at approximately 2-8 GHz. N can be
raised with less noise and distortion
of the signal. Until then, compound
semiconductors such as gallium arsenide
had been used for mm-wave
transceivers. This is because its highfrequency
characteristics are superior
to silicon. However, N is roughly one to
two. This is because integration of the
compound semiconductors is poor,
and the use of advanced modulation
technology is very difficult. Then I
chose CMOS technology due to its
sophistication of future modulation,
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