IEEE Solid-States Circuits Magazine - Winter 2022 - 29

the addition of ultrafast ADCs and
DACs, its integration with digital circuits,
and the reduced cost from mass
production. I was convinced the last
thing to survive would be CMOS.
When Dr. Kenich Okada and Dr.
Masaya Miyahara joined my lab as
an associate professor and assistant
professor, respectively, we started to
develop mm-wave CMOS transceivers.
The development was extremely difficult,
and the performance did not
occur at all in the first two years. The
device model was not accurate, so we
began to construct an accurate one.
We found that the reduction of the
phase noise of the oscillator became
a point for raising the transmission
speed. When the phase noise was
large, the phase space fluctuated, so N
could not go up. When the frequency
was as high as 60 GHz, the Q of the LC
oscillation circuit did not go up, and
the phase noise increased. If the oscillator
was configured at 20 GHz (one
third of the frequency), a higher Q
could be realized and the phase noise
of the source oscillator could be lowered.
This 20-GHz oscillation power
was injected into a 60-GHz oscillator.
Then the phase of the 60-GHz oscillator
was decided by the phase of the
injection signal of 20 GHz. This technology
was able to sharply reduce
phase noise power to 1/100 [26]. As a
result, an N of six was realized. This
is the point of technology that has
resulted in big jumps. These efforts
paid off, and in 2011, we announced
the first mm-wave CMOS transceiver
LSI [27], [28]. In 2012, they were able
to present a complete transceiver LSI
in combination with a baseband chip
[29]. Figure 14 shows a chip photo of
mm-wave CMOS transceiver LSIs [29].
Following that, improvement continued,
and it was found that the
circuit using broadband impedance
matching by negative capacitance and
feedback resistance was optimized
[30]. Figure 15 shows a transceiver
module using our developed chips.
The chip uses 16 QAM to achieve transmission
speeds of up to 6.2 Gb/s. Our
group continued to break the world
record for mm-wave transmission
speeds. In 2016, we achieved 42 [31],
56 [32], and 120 Gb/s [33], exceeding
the initial target of 100 Gb/s.
We spent nine years developing
mm-wave CMOS transceivers. At first,
multivalued modulation such as 16
QAM was considered impossible, but
now, 256 QAM is feasible due to the
improvement of oscillators and other
circuits, and it occurs at the same
level as current wireless communication
systems. I predicted that wireless
communication systems would be
integrated into a single SoC chip [34],
and the prediction was realized even
in the mm-waveband, which was considered
difficult to be achieved.
Educational Activities
After working at Panasonic for 25 years,
I became a full professor at Tokyo
Tech when I was 50. I trained not only
I MIXER
LNA
Q MIXER
LO BUF.
PLL LO BUF.
Logic
I MIXER
PA
Q.OSC.
Q MIXER LO BUF.
Tokyo Tech
LO BUF.
PLL
RF Chip: 65-nm CMOS
LO BUF.
Q.OSC.
Baseband (BB) Chip: 40-nm CMOS
ADC (I ch)ADC (Q ch)
VGA
VGA
RAM
DCTR
LDPC
Digital BB
DAC (Q ch)
DAC (I ch)
LVDS (11 ch)
SONY
FIGURE 14: A chip photo and block diagram of mm-wave CMOS transceiver LSIs [29]. PA:
power amplifier; LO: local oscillator; LNA: low-noise amplifier; PLL: phase-locked loop; VGA:
variable gain amplifier; RAM: random-access memory; CH: channels.
LVDS
(11 ch)
many students but also many industrial
circuit designers. Furthermore, I
worked on educational reform for the
Department of Electrical and Electronic
Engineering and Tokyo Tech
as a whole.
As one of the pioneers of video-rate
ADCs and DACs, I trained Panasonic's
engineers as lecturers of Panasonic's
technical seminars from my 30s as
well as other companies' engineers
as external seminar lecturers. In the
latter half of the 1990s, I lectured university
students and industrial engineers
on analog CMOS circuit design
as a part-time lecturer at the VLSI
Design and Education Center (VDEC)
at the University of Tokyo, Osaka University,
and Tohoku University.
In 1996, I began teaching analog
CMOS circuit design with expert
engineers in various fields of my
10 Gb/s (16 QAM)
Tx: 319 mW
Rx: 223 mW
FIGURE 15: A 60-GHz mm-wave transceiver module.
IEEE SOLID-STATE CIRCUITS MAGAZINE WINTER 2022
29
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IEEE Solid-States Circuits Magazine - Winter 2022

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