IEEE Solid-States Circuits Magazine - Winter 2022 - 31

creating a course overview, promoting
a simulation-based education, establishing
electrical science and technology
gatherings, and forming the
Faculty Development association for
young teachers my top priorities.
In 2014, I announced an educational
reform policy for the Department of
Electrical Engineering at Tokyo Tech in
a prominent technical magazine, Nikkei
Electronics, and announced it to the
industry. I made the curriculum system
for electrical engineering, which
emphasized story and organized the
relationship between subjects.
Tokyo Tech has been promoting fullfledged
educational reforms since 2012
under the strong leadership of formerPresident
Yoshinao Mishima. I was
appointed director in charge of educational
reform. I carried out the institutional
terpolating
CMOS ADC, " IEEE J. Solid-State
Circuits, vol. 28, no. 12, pp. 1200-1206,
Dec. 1993, doi: 10.1109/4.261992.
[8] A. Matsuzawa, " Low-voltage mixed analog/digital
circuit design for portable
equipment, " in Proc. IEEE Symp. VLSI Circuits,
Jun. 1993, pp. 49-54.
[9] A. Matsuzawa, " Low-voltage and lowpower
circuit design for mixed analog/
digital systems in portable equipment, "
IEEE J. Solid-State Circuits, vol. 29, no. 4,
pp. 470-480, 1993, doi: 10.1109/4.280697.
[10] " White paper on low power LSI technology:
Challenge toward 1mW operation, "
Nikkei BP, 1994.
[11] S. Sakiyama et al., " A lean power management
technique: The lowest power
consumption for the given operating
speed of LSIs, " in Proc. IEEE Symp. VLSI
Circuits, 1997, pp. 99-100, doi: 10.1109/
VLSIC.1997.623826.
[12] S. Sakiyama, J. Kajiwara, M. Kinoshita, K.
Satomi, K. Ohtani, A. Matsuzawa, " An onchip
high-efficiency and low-noise DC/
DC converter using divided switches with
current control technique, " in Proc. IEEE
ISSCC, 1999, pp. 156-157, doi: 10.1109/
ISSCC.1999.759172.
reforms and organizational
building to materialize the reform
policy. I promoted the establishment
of the Center for Innovative Teaching
and Learning and was appointed its
first director in 2015. I adopted several
experts in pedagogy and started
guaranteeing the quality of education,
developing educational methods,
building online learning systems, and
holding seminars on teaching methods
for teachers, for which I constructed
the course's design manual.
References
[1] A. Matsuzawa, M. Inoue, H. Sadamatsu, T.
Takemoto, and T. Yoneda, " Low-power parallel
8-bit A/D converter with video speed, "
in Proc. IEICE Annu. Meeting, 1981, p. 137.
[2] T. Takemoto, M. Inoue, H. Sadamatsu, A. Matsuzawa,
and K. Tsuji, " A fully parallel 10-bit
A/D converter with video speed, " IEEE J. SolidState
Circuits, vol. 17, no. SSC-6, pp. 1133-1138,
Jun. 1982, doi: 10.1109/JSSC.1982.1051871.
[3] M. Inoue, H. Sadamatsu, A. Matsuzawa, A. Kanda,
and T. Takemoto, " A monolithic 8-bit A/D
converter with 120 MHz conversion rate, " IEEE
J. Solid-State Circuits, vol. 19, no. SSC-6, pp. 837-
841, Dec. 1984, doi: 10.1109/JSSC.1984.1052234.
[4] A. Matsuzawa, M. Kagawa, M. Kanoh, K.
Tatehara, T. Yamaoka, and K. Shimizu,
" A 10b 30MHz two-step parallel Bi-CMOS
ADC with internal S/H, " in Proc. IEEE ISSCC,
pp. 162-163, 1990.
[5] H. Kimura, A. Matsuzawa, T. Nakamura,
and S. Sawada, " A 10-b 300-MHz interpolated-parallel
A/D converter, " IEEE J. SolidState
Circuits, vol. 28, no. 4, pp. 438-446,
Apr. 1993, doi: 10.1109/4.210026.
[6] A. Matsuzawa, S. Nakashima, I. Hidaka,
S. Sawada, H. Kodaka, and S. Shimada, " A
6b 1GHz dual-parallel A/D converter, " in
Proc. IEEE ISSCC, Feb. 1991, pp. 174-175.
[7] K. Kusumoto, A. Matsuzawa, and K. Murata,
" A 10-b 20-MHz 30-mW pipelined in[13]
T. Douseki, Y. Yoshida, F. Utsunomiya, N.
Itoh, and N. Hama, " A batteryless wireless
system uses ambient heat with a reversible-power-source
compatible
CMOS/SOI
DC-DC converter, " in Proc. IEEE ISSCC, Feb.
2003, doi: 10.1109/ISSCC.2003.1234348.
[14] T. Sakurai, A. Matsuzawa, and T. Douseki,
Fully-Depleted SOI CMOS Circuits and
Technology for Ultralow-Power Applications.
Berlin: Springer-Verlag, Apr. 2006.
[15] A. Matsuzawa, S. Nakashima, I. Hidaka,
S. Sawada, H. Kodaka, and S. Shimada, " A
6b 1GHz dual-parallel A/D converter, " in
Proc. IEEE ISSCC, Feb. 1991, pp. 174-178,
doi: 10.1109/ISSCC.1991.689115.
[16] K. Sushihara, H. Kimura, Y. Okamoto, K.
Nishimura, and A. Matsuzawa, " A 6-b 800 M
sample/s CMOS A/D converter, " in Proc.
IEEE ISSCC, Feb. 2000, pp. 428-429.
[17] K. Sushihara and A. Matsuzawa, " A 7-b
450MSPS 50mW CMOS ADC in 0.3mm2, " in
Proc. IEEE ISSCC, Feb. 2002, pp. 170-171,
doi: 10.1109/ISSCC.2002.992990.
[18] K. Okamoto et al., " A fully integrated
0.13-μm CMOS mixed-signal SoC for DVD
player applications, " IEEE J. Solid-State
Circuits, vol. 38, no. 11, pp. 1981-1991,
Nov. 2003, doi:10.1109/JSSC.2003.818131.
[19] A. Matsuzawa, " System on a chip and low
power technologies for digital consumer
electronics, " Cool Chips, Proc., 2000, pp.
149-173.
[20] A. Matsuzawa, " High quality analog CMOS
and mixed signal LSI design, " in Proc.
IEEE ISQED, Mar. 2001, pp. 97-104, doi:
10.1109/ISQED.2001.915212.
[21] A. Matsuzawa, " Mixed signal SoC: A new
technology driver in LSI industry, " in Proc.
IEEE ISCAS 2003, Bangkok, May 2003.
[22] A. Matsuzawa, " Mixed signal SoC era, " IEICE
Trans. Electron., vol. E87-C, no. 6, pp.
867-877, Jun. 2004.
[23] K. P. Parker, J. E. McDermid, R. A. Browen,
K. Nuriya, K. Hirayama, and A. Matsuzawa,
fabrication and mixed-signal IC
" Design,
testability structures, " in Proc. IEEE ITC,
1997.
[24] S. Kawahito et al., " A CMOS image sensor
with analog two-dimensional DCT-based
compression circuits for one-chip cameras, "
IEEE J. Solid-State Circuits, vol. 32, no. 12, pp.
2030-2041, Dec. 1997, doi: 10.1109/4.643661.
[25] A. Matsuzawa, " How to make efficient communication,
collaboration, and optimization
from system to chip, Invited " in Proc. IEEE DA C,
2003.
[26] A. Musa, R. Murakami, T. Sato, W. Chaivipas,
K. Okada, and A. Matsuzawa, " A low
phase noise quadrature injection locked
frequency synthesizer for mm-wave,
Applications " IEEE J. Solid-State Circuits,
vol. 46, no. 11, pp. 2635-2649, Nov. 2011,
doi: 10.1109/JSSC.2011.2166336.
[27] K. Okada et al., in " A 60-GHz 16QAM/8PSK/
QPSK/BPSK direct-conversion
er for IEEE802.15.3c, " Proc.
transceivIEEE
ISSCC,
Feb. 2011, pp. 160-161, doi: 10.1109/ISSCC.2011.5746263.
[28]
K. Okada et al., " A 60-GHz 16QAM/8PSK/
QPSK/BPSK direct-conversion transceiver
for IEEE802.15.3c, " IEEE J. Solid-State Circuits,
vol. 46, no. 12, pp. 2988-3004, Dec. 2011,
doi: 10.1109/JSSC.2011.2166184.
[29] K. Okada et al., " A full 4-channel 6.3Gb/s
60GHz direct-conversion transceiver
with low-power analog and digital baseband
circuitry, " in Proc. IEEE ISSCC, Feb.
2012, pp. 218-219, doi: 10.1109/ISSCC.2012.6176982.
[30]
K. Okada et al., " A 64-QAM 60GHz CMOS
transceiver with 4-channel bonding, " in
Proc. IEEE ISSCC, 2014, pp. 346-347, doi:
10.1109/ISSCC.2014.6757463.
[31] R. Wu et al., " A 42Gb/s 60GHz CMOS
transceiver for IEEE 802.11ay, " in Proc.
IEEE ISSCC, Feb. 2016, pp. 248-249, doi:
10.1109/ISSCC.2016.7418000.
[32] K. Tokgoz et al., " A 56Gb/s W-Band CMOS
wireless transceiver, " in Proc. IEEE ISSCC,
2016, pp. 242-243, doi: 10.1109/ISSCC.2016.7417997.
[33]
K. Tokgoz et al, " A 120Gb/s 16QAM CMOS
millimeter-wave wireless transceiver, " in
Proc. IEEE ISSCC, Feb. 2018, pp. 168-169,
doi: 10.1109/ISSCC.2018.8310237.
[34] A. Matsuzawa, " RF-SoC-expectations and
required conditions, " IEEE Trans. MTT,
vol. 50, no. 1, pp. 245-253, Jan. 2002, doi:
10.1109/22.981277.
About the Author
Akira Matsuzawa (matsu@techidea
.co.jp) received his B.S., M.S., and
Ph.D. degrees in electrical engineering
from Tohoku University, Sendai,
Japan, in 1976, 1978, and 1997,
respectively. In 1978, he joined
Panasonic. Since then, he has been
working on R&D for analog and
mixed-signal large-scale integration
technologies, video-rate analog-todigital
converters (ADCs), CMOS sensors,
radio-frequency CMOS circuits,
and MS systems on chip for DVD systems
and low-power technology. In
April 2003, he joined Tokyo Institute of
Technology, Meguro, Tokyo, 152 8550,
Japan, as a full professor, where he has
researched millimeter-wave CMOS
transceivers and advanced ADCs.
In March 2018, he became a professor
emeritus and the founder and CEO of
Tech Idea Co., Ltd., Takatsu, Kawasaki,
213 0033, Japan. He has been a Fellow
of IEEE since 2002.
IEEE SOLID-STATE CIRCUITS MAGAZINE WINTER 2022
31
IEEE Solid-States Circuits Magazine - Winter 2022

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