IEEE Solid-States Circuits Magazine - Winter 2022 - 7

THE ANALOG MIND
Behzad Razavi
A
The Design of an Equalizer-Part Two
As explained in " The Design of an
Equalizer-Part One " [1], we wish to
develop an equalizer meeting the following
performance:
■ data format: nonreturn-to-zero
■ data rate = 56 Gb/s
■ channel loss at 28 GHz = 20 dB
■ input differential swing 800mVpp
■ bit error rate (BER) 10 12
=
1
V 1VDD
=
.
-
■ power consumption = 10 mW
■
The simulations are carried out
with =- in the slow-slow
V 15DD
V %
corner of the process and at T 57C.
c
=
We surmised that a continuoustime
linear equalizer (CTLE) and a
decision-feedback equalizer (DFE)
would prove necessary for this purpose.
The two-stage CTLE designed in
the first part provides a boost factor of
about 13 dB at the Nyquist frequency
f
Ny 28GHz. The circuit delivers an
q =
eye height of 220 mV and an eye width
of 13.6 ps while drawing 5 mW. In this
part, we develop a DFE that achieves a
greater eye opening and, hence, allows
robust sampling of the data with a low
BER. The reader is referred to various
articles written on the subject [2]-[8].
General Considerations
Suppose that we apply an impulse
to a lossy channel (Figure 1). Due
to the medium's limited bandwidth,
the output exhibits a long tail. The
peak value is called the " main cursor, "
that at tTb
= is referred to as
the " first postcursor, " and so on.
Digital Object Identifier 10.1109/MSSC.2021.3126997
Date of current version: 24 January 2022
t
FIGURE 1: The impulse response of a channel.
IEEE SOLID-STATE CIRCUITS MAGAZINE WINTER 2022
7
0 Tb 2Tb
t
This time-domain characterization
reveals that each bit generates a tail
that interferes with the next bit(s).
We, thus, seek a method of canceling
this effect, recognizing that
a fixed channel exhibits a
certain ratio between the
amplitudes of, for example,
the first postcursor and
the main cursor. Denoting
this ratio by ,h1
we
articulate the necessary
operation as follows:
the present bit should
be " memorized, " scaled
by a factor of ,h1
and
subtracted from the next bit so as to
remove the interfering tail. This function
is afforded by a DFE.
In this simplest form, a DFE
senses the data, makes a binary
decision, delays the result by a 1-b
period Tb
, and feeds a scaled copy of
the result back to the input. Shown
in Figure 2(a) is a possible realization,
where the flip-flop (FF) performs
both the decision action (also
referred to as " slicing " ) and the
delay function. The return path has
a scaling factor of h1
and is called
the " first tap " or " first coefficient. "
We expect that the tail cancellation
accords the " summing junction "
signal
D ,sum
In this simplest
form, a DFE senses
the data, makes
a binary decision,
delays the result
by a 1-b period Tb
,
and feeds a scaled
copy of the result
back to the input.
a greater
eye opening than that
at the DEF input.
It is instructive to
examine the DFE waveforms
in a favorable
condition, i.e., with little
channel loss. As illustrated
in Figure 2(b), the
first bit B1
is delayed and
as
this
scaled by a factor of h1
it appears in DF. Upon subtraction
from the next bit B ,2
scaled replica increases the voltage
swing to
--1 h .1
Similarly, B2
the amplitude of B3
to ++1 h .1
boosts
We
conclude that a 1010 data sequence
experiences greater swings as a
result of the DFE action, a highly
desirable effect, as such a sequence
displays the most severe eye closure
in a lossy medium [1].
Interestingly, the DFE introduces
its own eye closure in the presence
of consecutive ones (or zeros), also
Main Cursor
Postcursors
h1
Channel
h2
IEEE Solid-States Circuits Magazine - Winter 2022

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