IEEE Solid-States Circuits Magazine - Winter 2022 - 71

technologies with long-term measurement
to treat on demand.
State-of-the-art biomedical ICs
and systems have further advanced
this year at ISSCC 2022, with miniaturization,
higher sensitivity, a
higher dynamic range, and interference
mitigation as significant trends
in implantable and wearable devices,
while improving power efficiency with
high-input-impedance AFE. High-dynamic-range
(>140 dB) sensing systems
improve tolerance to large-amplitude
interference and motion artifacts. At
the same time, new techniques are introduced
to sense physiological signals
such as PPG, IPG, BIOZ, and ExG. Miniaturization
combined with a high level
of integration and wireless functionality
enables wireless neural implants
without tissue damage and infection
for interfacing with the brain.
Innovations in the on-chip classification
of neurological signals that
perform inference-based machine
learning have the potential to offer
improved neural interfaces to treat on
demand and in a closed loop. Incorporating
low-energy machine learning at
the edge with a high channel count of
recording and stimulation will enable
emerging therapeutic techniques
to restore a healthy condition from
chronic pain and other disorders without
the side effects of drugs. These
advances offer tremendous market
potential in the medical market space.
Innovative Topics: Imagers
Subcommittee Chair: Chris Van
Hoof, IMEC, Leuven, Belgium
The CMOS image sensor market is mainly
driven by consumer applications,
seeing mobile devices and smartphones
embedded an increasing number of
cameras: manufacturers are making
huge efforts to reduce the image sensor
footprint and incorporate more functionalities.
Moreover, the adoption of
multiple cameras for automotive applications
and medical imaging is steadily
increasing. These are key factors contributing
to the growth of this segment,
which from an estimated US$18.5 billion
in 2020, is projected to reach
2,000
1,000
US$28 billion by 2025. Beyond conventional
photography, depth sensing
is gaining strong momentum for user
identification, augmented reality, and
gaming, and vision sensors are carving
out a niche in low-power applications.
Progress in image sensors is more
and more intertwined with the specialization
of the fabrication process,
such as the integration of reliable single-photon
detectors, full-depth trench
isolation, backside illumination, efficient
transfer gates, and maximized
collection volume. In parallel, novel
architectures pushed by technological
advances are enabling advanced features
to be implemented on-chip and
on-pixel with high efficiency.
At ISSCC 2022, the interest and
progress in depth and single-photon
avalanche diode (SPAD) sensors are
well represented. SPAD-based imagers
show their evolution and confirm the
recently started trend with applications
in intensity imaging. A 1-megapixel,
color, 3D-stacked back-side
illuminated (BSI) SPAD array showing
a 143-dB dynamic range, by Canon,
demonstrates that these sensors are
rapidly exploiting all major innovations
available for conventional image
devices. Depth sensors using SPAD arrays
are integrating smarter and more
efficient techniques to cope with harsh
ambient light conditions and high data
rates by performing neighbor detection
validation and in-pixel distance
extraction. Also, indirect time of flight
is continuously evolving, reaching a
record precision of 38 µm.
For high-resolution-intensity
imaging, stacked BSI technology
has become an established standard,
enabling excellent sensitivity and onchip
processing, while the pixel race
has gained new speed: in just one year,
the smallest pixel pitch reported at ISSCC
decreased by 14% while maintaining
all other key quality parameters.
This accelerated shrinking is evident
in two Samsung works: a 64-megapixel
image sensor exhibiting a world-first
0.56-µm pitch and a 50-megapixel image
sensor with 1-µm dual pixels, with
full-depth isolation trenches for alldirection
autofocus. Novel approaches
to vision sensors are aiming at alwayson
sensors with extremely low power
consumption. This is accomplished
through several techniques that include
charge domain extensive pixel
binning for multiple-resolution operation
and time-based pixel processing
with enhanced dynamic range.
Innovative Topics: Technology
Directions
Subcommittee Chair: Makoto
Nagata, Kobe University, Japan
Technology innovations bring the
promise of enabling new system
functionalities and substantially increasing
the efficiency of existing
100
10
1 bit/Cell (SLC)
2 bit/Cell (SLC)
3 bit/Cell (SLC)
5 bit/Cell (SLC)
1
2000 2002 2004 2006 2008 2010 2012
Year
FIGURE 31: The NAND flash memory capacity trend.
IEEE SOLID-STATE CIRCUITS MAGAZINE WINTER 2022
71
2014 2016 2018 2020 2022
MB/mm2
IEEE Solid-States Circuits Magazine - Winter 2022

Table of Contents for the Digital Edition of IEEE Solid-States Circuits Magazine - Winter 2022
