IEEE Power Electronics Magazine Compendium - March 2018 - 45

The products available
today are clearly
superior to their
silicon cousins, yet still
far from theoretical
limits.

Power Conversion Corporation) transistors today have an advantage of a
factor between 2.4 and 3.2 times [2]
using this FOMss.
In either hard- or soft-switching
topologies, the latest eGaN transistors have a clear advantage in capacitance (charge is the integral of capacitance over a range of voltage), but that is only half the story.
Inductance also plays a major role in the switching performance of a system. As current transitions (di/dt) become
faster, inductance plays a greater role.
Semiconductor packaging adds a significant amount
of inductance to the system and can, therefore, attenuate performance. To illustrate this point, Figure 1 shows a
simulation of only the switching losses of an EPC2015 eGaN
field-effect transistor (FET) packaged in three traditional
MOSFET packages, SO-8, LFPAK, and DirectFET. The losses
were calculated for a 1-MHz, 12-VIN, 1.2-VOUT hard-switching
buck converter at 20 A. In a traditional SO-8 package, there
is a combined internal inductance of 1.3 nH from the wire
bonds and copper lead frame that connect the device to the
printed circuit board (PCB). This inductance slows down the
switching transition and, therefore, causes increased power
dissipation in the transistor. Using the EPC2015 eGaN FET
as the common transistor, 82% of the losses of the device
are caused by the parasitic inductance of this package. In
an LFPAK, the losses are reduced to 73%. They are reduced
further to 47% in the highly efficient DirectFET.
The eGaN transistors from efficient power conversion
are all produced in a chip-scale format with solder bars that
are used to directly connect to the PCB. This packaging format is made possible because these FETs, similar to some
low-voltage silicon MOSFETs, are lateral devices-the gate,

Device Loss Breakdown

2.5
Power Loss (W)

5) lower cost. There is an unspoken
sixth requirement that users assume
will be included-flawless reliability.
From time to time, different technologies, such as gallium arsenide or silicon
carbide (SiC), have improved on one or
more of these basic requirements. This
article will show that GaN grown on a
silicon crystal can improve upon all five characteristics when
compared with the best silicon devices available.
The first requirement for a better power transistor is
lower on-resistance. A comparison between the theoretical
limits of silicon, GaN, and SiC in just the two dimensions
of on-resistance and blocking voltage is given in [1]. The
products available today are clearly superior to their silicon
cousins yet still far from theoretical limits. Similar to what
happened over a period of 30 years with the silicon metal-
oxide-semiconductor field-effect transistor (MOSFET),
GaN will continue to move closer to the physical limits of
the crystal.
Switching speed is a more complex subject because
one needs to consider the entire spectrum of possible circuit topologies and layouts. However, the problem can be
broken down into two general topologies, hard switching
and soft switching, and two basic device characteristics,
capacitance and inductance.
In a hard-switching transition, two parameters have the
greatest impact on switching speed, Q GD, the gate-to-drain
charge, also known as the Miller charge, and Q GS2, the current transition charge. For the voltage transition period, the
device parameter determining loss is Q GD, and for the current transition period, the device parameter determining
loss is Q GS2 . By multiplying the sum of these two charges
times the on-resistance of a transistor, a hard-switching figure of merit ^FOM HS h can be derived that is generally predictive of relative switching performance-both speed and
power losses during the transition. When measured using
this FOM HS, GaN transistors available today are between
five and ten times superior to the best power MOSFETs [2].
In a soft-switching topology, the transistor is typically
switched with at- or near-zero volts across the drain-source.
As a result, the key component of converter loss and key
determinant of the time to establish 0 V across the device is
the output charge Q OSS . At frequencies above a few hundred
kilohertz, the amount of charge that needs to be delivered
to the gate electrode, Q G, can also become significant. Adding these two charge components together and multiplying by the on-resistance of the device, the user has a convenient soft-switching figure of merit ^FOM SS h that can be
used to compare products from different technologies and
manufacturers. The eGaN (eGaN is a trademark of Efficient

Package

2
1.5

Die
82%

73%
47%

0.5
0

18%

27%

53%

18%
82%

SO-8

LFPAK

DirectFET

LGA

fig 1 The switching loss calculation for an EPC2015 eGaN FET
in various power MOSFET packages and in a chip-scale land grid
array (LGA) format. The circuit is a 1-MHz, 12-VIN, 1.2-VOUT, hardswitching buck converter, and the data are at 20 A.

March 2015

z IEEE PowEr ElEctronIcs MagazInE

Table of Contents for the Digital Edition of IEEE Power Electronics Magazine Compendium - March 2018