IEEE Power Electronics Magazine Compendium - March 2018 - 81

converter (AFEC) is tied to an MV 13.8-kV distribution grid
with a three-level neutral point clamped (3L-NPC) converter
built using the 15-kV SiC IGBTs. It is a PWM boost rectifier
with a 22-kV dc bus on the output, and it is operated with
hard-switched sine-triangle pulsewidth modulation (SPWM)
at 3-5 kHz. The AFEC dc bus (22 kV) is converted to a LV-side
dc bus (800 V) using an HF dc-link, enabled by a three-phase
dual active bridge converter (DABC) [10].
The DABC is responsible for isolation and voltage conversion in the TIPS system. The DABC is a zero-voltage
switching (ZVS) soft-switched converter operated at
10 kHz. The MV side of the DABC is also a 3L-NPC converter built using 15-kV SiC IGBTs, and the LV side has a
1,200-V SiC MOSFET half-bridge modules-based two-level
(2L) converter for each star- and delta-connected secondary winding. The output LV inverter stage is developed
using 1,200-V SiC MOSFET modules with three interleaved
17-20-kHz, 35-kVA converters.

15-kV SiC n-IGBT Characterization
The 15-kV SiC n-IGBTs were developed by Cree for the first
time, sponsored by an ARPA-E program. The TIPS is chosen
as a platform for demonstration of the 15-kV SiC IGBT as it
enables integration of a 13.8-kV, three-phase grid with a simple three-level converter topology. Figure 2 shows the
copack module developed by Powerex for the 15-kV SiC
IGBT, with two 10-kV SiC junction barrier Schottky (JBS)
diodes (in series), current-sensing resistors, and a thermistor
for temperature measurement. The active area of the 15-kV
SiC n-IGBT is 0.32 cm2, with a total chip area of 8.4 mm #
8.4 mm. It is a punch-through device with a drift thickness of
140 nm, as shown in Figure 3. Two different 15-kV SiC IGBT
designs with field-stop buffer layer thicknesses of 2 and
5 nm have been evaluated for TIPS application.
Understanding the behavior of state-of-the-art SiC IGBTs
is very critical for the development of the MV TIPS. Therefore, a double-pulse test setup was built to characterize SiC

Gate

Emitter

Emitter

n+

n+

p-Well

p-Well
140 nm, 2 # 1014 cm-3
n- Epilayer
n Field-Stop Buffer
p+ Injector Epilayer
Collector

fig 3 A simplified cross-sectional view of the 15-kV SiC n-IGBT.

IGBTs up to a 11-kV dc voltage and a junction temperature
of 175 °C [11], [12]. Both turn-on and turn-off switching transients exhibit distinct two-phase voltage transitions due to
the deep punch-through design of the IGBT. The forward
drop is increased by about 15% with a temperature rise from
25 to 150 °C. However, the turn-off switching loss is increased
by a factor of two from 25 to 175 °C due to increased injection from the backside p+ layer at elevated temperatures.
The turn-off switching transition duration at 10 kV, 10 A, and
175 °C is about 800 ns for the 5-nm buffer layer IGBT, with
negligible tail current. The turn-off switching loss (at 25 °C)
at for 5-nm IGBT is 7.2 mJ, whereas it is 20.4 mJ for a 2-nm
IGBT. On the other hand, the 5-nm buffer layer IGBT has a forward drop of 7.2 V, whereas it is 6.0 V for the 2-nm buffer layer
IGBT at 20 A and 25 °C. The SiC IGBTs have extremely fast
switching transients, with turn-on dv/dt around 100 kV/ns
over the punch-through voltage range. Figure 4 shows a
comparison of the 2- and 5-nm IGBT turn-off transient at
10 kV, 10 A, and 25 °C, where it is evident that the 5-nm IGBT

Diodes

Vce (kV), Ic (A)

15

IGBT

Vce of 5-nm IGBT

Vce of 2-nm IGBT

Ic of 5-nm IGBT

Ic of 2-nm IGBT

10
5

0
Current-Sensing
Resistors

-5
-2

0

2

4

6

Time (seconds)

8
#

10
10-7

Thermistor
fig 2 The 15-kV SiC n-IGBT copack module [12].

fig 4 The turn-off transitions of a 15-kV, 2- and 5-nm-thick buffer layer, SiC IGBT at 10 kV, 10 A, and 25 °C with R G^OFFh of 10 X.
September 2015

z	IEEE PowEr ElEctronIcs MagazInE

81
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