IEEE Power Electronics Magazine - June 2016 - 25

subroutine. If the variable is updated by the ADC hardware,
the values coming from PSIM are overwritten and the
simulation becomes incorrect.

The PIL block's output is the controller output voltage computed by the MCU. The variable corresponding to the controller output is read by the CS and its value is sent to the
SE. The voltage received is fed to the PWM conversion
module. The PWM conversion module consists of a voltage
comparator and a triangular voltage source. The voltage
source is configured to match the specification used by the
F28335 PWM block. The PWM is generated with the controller output fed to the comparator's positive terminal and
the voltage source to the negative terminal. The PWM
waveform generated is fed as the feedback to the plant and
the loop is completed. The PWM conversion module consists of a single comparator for one-phase operation and
three comparators connected in parallel for three-phase
operation. The comparators and voltage source are
provided in the PSIM library.

ac
Vin

PWM
Conversion
Block

FIG 7 The PFC circuit for the PIL simulation.

200

-200
0.50

0.51

0.52
0.53
Time (s)
(a)

0.54

0.55

0.51

0.52
0.53
Time (s)
(b)

0.54

0.55

0.51

0.52
0.53
Time (s)
(c)

0.54

0.55

Current (A)

10
0
-10
0.50

PFc system

10
Vm (V)

A PFC circuit with a simple power stage and double-loop
voltage and current digital control system with input voltage
sensing is simulated using the PSIM SE. The circuit for the
SIL simulation is presented in Figure 6. The parameters for
the circuit are presented in Table 3. For this example, both
the current and the voltage loop are running at 30 KHz. The
circuit is used to generate the code for the MCU by adding
the MCU peripheral modules for the ADC and PWM from
the SimCoder library. The code is compiled in CCS and the .
out file is generated. Figure 7 contains the circuit used for
the PIL simulation. The data sampling is done by the PIL
block, and therefore an ADC block is not needed.
The PIL block for the PFC circuit is a multi-input, single-output block. Each input is separately configured
according to the sampling frequency, gain, and delay for
the signal. The PIL block's output goes to a 1-ph PWM
converter block. The PWM block's output is fed back
into the circuit. Further, the PIL simulation setup with
the MCU (F28335) is connected to the PC running the
SE instance using an emulation board and USB cable,
and the setup is simulated. The resultant waveforms for
the inductor current, input and output voltage, and controller output voltage are presented in Figures 8 and 9

Power Stage

PIL
Block

Model Testing with PIL
The PIL system is tested with both simple power electronic
circuits and more complex motor control algorithms. The
testing is done with a power factor correction (PFC) circuit
and a permanent magnet synchronous motor (PMSM) fieldoriented control (FOC) motor drive example. The simulation results are compared with the SIL and MIL simulation
for the PFC and the PMSM FOC motor drive circuit is tested
and compared with the SIL simulations.

Ld
+

Voltage (V)

controller output to PwM conversion Module

Lin

5
0.50

FIG 8 The simulation results for a PFC circuit in SIL (using PSIM).
(a) Vin and downscaled Vo, (b) I (Lin) and Iref, and (c) controller output (Vm).

for PSIM and PIL simulations, respectively, and are
almost identical.

Foc of PMsM Motor Drive
The PMSM FOC is designed using PSIM with the MCU
peripheral modules based on the conventional FOC scheme
[19] through the drive as detailed in Figure 10 and Table 4.
The power stage is connected to the digital FOC algorithm
June 2016

z IEEE PowEr ElEctronIcs MagazInE

Table of Contents for the Digital Edition of IEEE Power Electronics Magazine - June 2016