IEEE Power Electronics Magazine - June 2020 - 101

prototype. We laid out the printed
circuit board (PCB) using tape and
Mylar mats (my first PCB design).
After we got the prototype working
well, we took it over to disk engineering. We were able to power the hard
drives with no more disk errors than
with a linear power supply. This was
the first time at DEC that a hard drive
had been successfully powered by a
switching power supply.
The main system on-off power
switch had to be on the front of the
system (Figure 1). The ac power inlet
and input voltage range select switch
were on the rear (Figure 2). The fan,
which cooled not only the power supply but the entire system, was on the
side, venting out the side of the system enclosure. The usual approach at
DEC was to use a double pole, double
throw switch for input voltage selection. This switch also configured the
primaries of the auxiliary supply
transformer in parallel for operation
from 120 V and in series for operation
from 240 V. The ac-powered fan was
placed in parallel with one of the two
primaries of the auxiliary transformer. When operating from 240 V, the
series-connected primaries acted as
an autotransformer to create 120 V
for the fans.
For the H7862C, this arrangement was going to create a wiring
harness nightmare, with wires running back and forth between the
front and rear of the power supply. I
came up with an arrangement that
greatly simplified the input wiring
(Figure 3). The input voltage range
selector switch was, like in many
power supplies of the time, a single
pole, single throw switch that connected the neutra l input to the
diode bridge to the center tap of the
main filter capacitors. I then connected the auxiliary transformer
from that capacitor center tap to
the line input of the diode bridge.
This meant that the primary of the
auxiliary transformer always operated at 240 V (even if the input was
120 V). I had the primary of the auxiliary transformer center-tapped to
make an autotransformer to always

run the fan at 120 V. I always think
that I should have applied for a
patent on that configuration, but I
never did.
To precisely meet the timing and
behavior specification of the ACOK
and DCOK signals, I designed a logic
circuit using 4000-series CMOS logic.
The timing was controlled by, as I
recall, using 4047 one-shot multivibrators. The ACOK and DCOK signals
were open collector, open drain. To
meet the requirement that these signals be pulled low when the power
was off, J176 P-channel JFETs were
used as the output device.
For current limiting, I sensed the
+5- and +12-V output currents on the
high side. I used a precision divider to
divide the signal down into the input
common-mode voltage range of the
LM339A comparators used to detect
an overcurrent. I initially did not have
the dividers and connected the comparator inputs directly to the output
rails. This did not work. I still recall
sitting at John Herrmann's desk,
where he opened up one of those
massive, classic, blue-covered Na tional Semiconductor data books and
walked me through the internals of
the comparator, showing me the PNP
transistor inputs and explaining the
input common voltage range specifications to me.
Output overvoltage protection
used the standard DEC design of the

day. The +5-V output was connected
through a resistor to a Zener diode
and the gate of a 2N6028 programmable unijunction transistor (PUT). The
anode of the PUT was connected to
the +5-V output. If the +5-V output
(anode) increased to roughly a diode
drop above the Zener voltage (gate),
the PUT would trigger. The cathode
of the PUT was connected to the gate
of a C122F silicon controlled rectifier
(SCR). When the PUT turned on, it
drove current into the gate of the
SCR, turning the SCR on.

FIG 1 The front view of the H7862C.

FIG 2 The rear view of the H7862C.

FIG 3 The open view of the H7862C.

June 2020

z	IEEE POWER ELECTRONICS MAGAZINE

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