IEEE Power Electronics Magazine - June 2021 - 66

cells with graphite and Si anodes. Despite the cascading of
battery cells a boost conversion stage is required to achieve
high voltage and high power capability. Galvanic isolation is
an additional requirement for high power applications
which can be also provided by an isolated dc-dc power
stage. An additional dc-ac conversion stage is considered
for interfacing with the electrical grid or ac drives. The high
energy density of Si batteries allows highly integrated systems
as required in mobile applications, especially in combination
with wide bandgap (WBG) devices based on gallium
nitride (GaN) or silicon carbide (SiC) FETs. Particular challenges
for the management of Si batteries lie in the protection,
in the SoC regulation and in the thermal management.
Battery Management System
BMS are very important for minimum sizing and maximum
utilization of battery systems, particularly important for
high power applications, including protection, balancing of
SoC and thermal management [16]. SoC balancing methods
can be categorized as passive and active methods, according
to Figure 7. Instead of using shunts for SoC regulation,
active balancing methods can be realized with capacitive/
inductive energy storage elements or based on converters
that are preferred for high power applications due to high
efficiencies [16]. Modular converter topologies, exemplary
shown in Figure 8, are providing the highest flexibility to
select the battery cells [16] for acting on the mission profiles
and the protection of each battery cell.
The battery management has an impact on power semiconductor
stress as well. Remarkably, literature currently
splits this into two fields: the reliability of power electronics
and of batteries. However, similar to the interaction
of machines with power converters, the mission profiles
and, therefore, the thermal stress of the devices is coupled.
IS2
VS2
dc
ac
ac
ac
VL
dc
VS2
VS2
dc
dc
ac
Vout
IL
VL
Source
Pin
Converter
Load
POut
Losses
(a)
1
0.8
0.6
0.4
0.2
Secondary
Primary
100
DAB-FPP
DAB-PPP
99
98
97
96
DAB-PPP
DAB-FPP
(c)
FIG 9 Comparing dc-dc converter solutions: (a) full power processing, (b) partial power processing, (c) efficiency and cost between
the two solutions.
66 IEEE POWER ELECTRONICS MAGAZINE z June 2021
20 30 40 50 60 70 80
SOC of EV (%)
Losses
(b)
Source
Pin
Direct Power Flow
η = 1
Converter
Load
POut
Cost (p.u.)
η (%)

IEEE Power Electronics Magazine - June 2021

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