IEEE Power Electronics Magazine - June 2023 - 50

frequencies, higher power density,
and with exceptional thermal performance.
However, as this technology
progressively becomes mature, questions
still arise regarding its long-term
reliability. These questions can be
answered proactively using accelerated
lifetime tests (ALTs). ALTs accelerate
the aging mechanisms by
amplifying the thermal and electrical
stresses. The data from ALTs serve a
crucial function for evaluating the
sustained reliability of SiC MOSFETs
through assessment of their lifespan,
identification of breakdown causes,
and continuous monitoring of their
performance. This article introduces
an ac power cycling test setup for SiC
MOSFETs and discusses the correlation
of aging precursors to different
failure mechanisms. Also, the study
identifies and presents patterns of
common precursor shifts.
Accelerated Lifetime Tests
Accelerated lifetime tests are used to simulate the aging
mechanisms that power semiconductor devices experience
in the field by exposing them to a controlled environment
with elevated levels of electrical and thermal
stresses [3]. By conducting ALTs, manufacturers and engineers
observe changes in device parameters and characteristics
and make necessary improvements in device
structure to enhance reliability or develop condition monitoring
tools for field applications. Additionally, ALTs help
manufacturers to provide accurate lifetime estimates. The
most common degradation mechanisms that SiC power
devices can experience include: 1) gate oxide degradation,
2) package degradation (including die attach degradation
and wire bond degradation), and 3) body diode
degradation. These degradation mechanisms can have a
significant impact on the performance and reliability of
SiC power devices. Therefore, it is essential to understand
and control them through rigorous testing and
design optimization.
A. Gate Oxide Degradation: The gate oxide is a thin
insulating layer of silicon dioxide (SiO2) that plays a critical
role in current flow control through the device, controls
the flow of current, and helps to prevent short circuits. Its
integrity is crucial for ensuring reliable performance and
preventing device failure. Gate oxide degradation can
occur due to a variety of mechanisms, including hot carrier
injection (HCI) [4], bias temperature instability (BTI)
[5], and time-dependent dielectric breakdown (TDDB) [6].
When gate oxide degradation occurs, it leads to an increase
in the gate leakage current, a reduction in the breakdown
voltage, and an increase in the gate capacitance. These
50 IEEE POWER ELECTRONICS MAGAZINE z June 2023
By conducting ALTs,
manufacturers and
engineers observe
changes in device
parameters and
characteristics and
make necessary
improvements in device
structure to enhance
reliability or develop
condition monitoring
tools for field
applications.
changes negatively affect the performance,
efficiency, and lifetime of the
device. To mitigate the effects of gate
oxide degradation, it is essential to
use high-quality gate oxide materials
and minimize extrinsic defects
and impurities during the fabrication
process.
B. Package Degradation: Package
degradation refers to the gradual deterioration
of the physical and electrical
properties of a power device package
over time. The package plays a critical
role in protecting the power device
and facilitating the transfer of heat
and electrical signals between the
device and the external circuit. Package
degradation can cause changes
in the dimensions and physical properties
of the package, as well as lead
to the formation of defects and impurities.
Die attachment and wire bond
solder are the dominant parts of the
package, which are subject to degradation due to temperature
cycling and mechanical stress [7], [8].
C. Body Diode Degradation: Body diode degradation
refers to a gradual deterioration in the intrinsic p-n junction
diode that is formed between the source and drain terminals
of the MOSFET. Over time, the performance of the body
diode can degrade due to factors such as exposure to high
temperature and high reverse-bias voltage and the accumulation
of impurities in the p-n junction. This degradation
causes an increase in the reverse-recovery time and forward
voltage drop of the diode, increases reverse recovery
losses, reduces its efficiency, increases the reverse-leakage
current, and eventually reduces the device's lifetime.
A number of accelerated lifetime tests have been suggested
to assess the aforementioned failure mechanisms.
High-temperature gate bias (HTGB) and high-temperature
reverse bias (HTRB) tests accelerate gate oxide aging by
exposing the gate and drain to high temperatures and a
steady voltage, respectively. The main purpose of this test
is to verify the stability of the gate oxide integrity over
time and temperature. In the HTGB test, the drain and
source are connected, subjecting the channel and JFET
regions to an electric field. As a result, TDDB and BTI are
anticipated to contribute to the aging of the oxide [6]. The
HTRB test involves applying a negative bias to the gate
and a positive voltage to the drain-source terminals. This
test subjects the gate oxide to static stress. HTRB can
cause an increase in the electric field across the oxideinsulating
layer of the MOS transistor, leading to oxide
breakdown and the formation of defects in the oxide
layer. The high-temperature gate switching (HTGS) test
provides a more realistic simulation of the device's behavior
by applying high-frequency pulses to the gate-source,
IEEE Power Electronics Magazine - June 2023

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