lateral-loop inductance-and it does. The double-sided return-path of Figure 8 has a total loop-inductance of 6.2 nH. This is still more than double compared to Figure 5, but a significant improvement over the single-sided return-path. The Advantage of Topside-Cooled Transistor Packages The previous layout options using bottom-side cooled packages all require compromises in electrical layout to accommodate the thermal vias necessary to remove heat from the transistor(s). Adding 100 or more thermal vias per transistor not only compromises the electrical layout, but vias cost money: every drill operation (especially for small-diameter drills) adds cost to the PCB manufacturing process. Another option to consider is using topside-cooled transistor packages. Sometimes these are simply the same bottom-side cooled devices with a flipped lead-bend. But in most cases, the topside-cooled transistors are packages specifically designed to optimize both thermal and electrical performance of GaN transistors. Figure 9 shows an example of the same half-bridge layout, but this time using a TOLT package. The big difference here is that, compared to the previous layouts, there are NO thermal via fields required below the transistors. This saves cost, and allows electrical layout optimization independent of the thermal path. An additional benefit is that the ground and +Bus planes, which are electrically " quiet " equipotential planes, serve as Faraday shields between the noisy switch-node and any other FIG 7 The ground-plane clearance around via-field creates a lateral-loop in the return-path. L = 8.8 nH. FIG 8 Double-sided return-path around thermal via field helps to minimize lateral-loop inductance. L = 6.2 nH. June 2023 z IEEE POWER ELECTRONICS MAGAZINE 71