IEEE Power Electronics Magazine - March 2020 - 60

and error and highly educated guesses. However, to achieve the best and
most reliable performance, technology platforms must be translated
into a rich set of models that scale;

include parasitic interactions; are
characterized overall with temperature, voltage, and current conditions;
and include realistic process variations. This is no small task, one that

VDD

VDDF

VIN

Sync
Boot
HSIN

Level
Shift

Output
Driver
SW

Logic
and
UVLO
LSIN

VDD
Output
Driver

GND

FIG 3 All the basic functions of a power stage are shown in this simplified circuit
diagram, including output FETs, drivers for these FETs, level shifting for the high-side
circuitry, input logic and protection, and a synchronous bootstrap function to generate
the voltage needed to drive the high-side circuitry. GND: ground.

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creates a natural tension with the
quickly improving discrete FET performance. On the one hand, it takes
time and effort to fully characterize a
technology platform. On the other
hand, if the technology platform is
changing more quickly than the characterization process, then the IC
products lag behind their discrete
counterparts in performance and
cost-effectiveness.
The initial output of this more formalized approach was first demonstrated in March 2019. It is a fully
monolithic half bridge that integrates
all of the drive and level-shift functions
along with the bootstrap function. The
simplified circuit diagram containing
all of the essential functions of a power
stage is shown in Figure 3 and the actual device is presented in Figure 4.
Although simple compared to modern digital processors, this single-chip
power stage provides a first demonstration of the integration of many
important fundamental functions. It
includes comparators, a central building block for decision making in an IC;
feedback for control of output action;
latching for isolation of input and output; electrostatic discharge immunity
for assembly robustness; and voltage
isolation between high- and low-side
devices on a single substrate. Nearly
any IC can be made with only this set
of building blocks. Although refinement and improvement will continue at
a rapid pace, this first demonstration
shows the immense opportunity available for GaN ICs and the bright future
GaN has for increasing the performance and cost of power conversion.
This product from EPC (part EPC2151)
was designed for a buck converter
topology with an on-resistance ratio of
approximately 3:1 between the lowand high-side transistors.
Figure 5 shows the system efficiency of the monolithic power stage
(green line) when it is operated as a
buck converter at 1 MHz with 48 VIN
and 12 VOUT at 10 A. The red dot in
Figure 5 shows the comparative performance of a state-of-the-art Si solution at 1 MHz. The GaN monolithic
power stage achieves a 30% reduction

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IEEE Power Electronics Magazine - March 2020

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