IEEE Power Electronics Magazine - March 2021 - 62

6.6 Loop Gain Derived Metrics for PRM Hardware

6.8 Hardware Testing of the PI3106-00-HVMZ [11]

Loop gain data derived using the voltage injection technique
is included, along with output impedance derived parameters in table 2.

The final example illustrates the facility of the NISM testing.
An evaluation test fixture PI3106-01-EVAL [12] underwent
NISM in its original form, then modified and retested.
Certain filter capacitors are preapplied to this test fixture - 100 uF of aluminium electrolytic (ALEL) parallel
with 28.2 uF of ceramic capacitance on the input port. The
output port has 13.2 uF of ceramic capacitance.
The NISM responses of the regulator are shown in Figure 13. The original system response is traced in green.
Additional capacitance was then added, effect of which is
shown in the red trace - an extra 100 uF was placed across
the input port and 820 uF ALEL capacitor added across the
load. Phase margin is indicated as 55.02 degrees. Note that
the 1st Q peak in the red curve occurs at 1.096 kHz.
The load current for both tests was set to 1.37 A with the
output voltage trimmed to 13.3 V.
The peaking of the modified regulator has been shifted
to lower frequency - shaped by the reactance contribution
of the ALEL capacitors. There is roughly a 500 Hz difference
between the impedance peaks in the green and red traces.
The pulsed response for the PI3106-00-HVMZ device with
extra cap is shown in figure 14 with traces colors of which
are consistent with Figure 13. The base load is 1.37 A with an
added 0.26 A pulse. The damped oscillation in output voltage
has a period of 848 usec, corresponding to 1.18 kHz - close
to the resonant frequency of 1.096 kHz measured with NISM
method. Referring to Figure 8, it would appear that the templates for g = 0.4 and g = 0.7 bound this particular response,
indicating that Q is in the range 1.25 to 0.71. The NISM determined Q-value is 0.79 (using equation [6]), corresponding to a
phase margin of 55.2 degrees. The regulator has good phase
margin and a crossover frequency close to 1 kHz according to
the analysis of NISM and TD perspectives.

6.7 Pulsed Load Testing of the PRM Hardware
Paralleled switched and static loads are applied across the
PRM's power output port in order to simulate a short duration pulsed load set on a dc current at low duty cycle.
Figure 12 shows the TD pulse test outcome for the PRM
regulator in the LL condition. The MOSFET load switch gate
voltage is traced in purple, load current in light blue and
the output voltage perturbation in yellow. Here a 130 mA
step is superimposed on 1.056 A base load current. Based
on the closest template to this TD behavior in Figure 8, the
response associated with g = 0.2 appears less damped than
the yellow trace, corresponding to a Q of between 1.5 and
2.5. The measured period, 69 usec corresponds with a frequency of 14.5 kHz, close to the NISM figure of 15 kHz.

Table 2. Summary of empirical ac parameters for
the PRM.
PRM Loop Gain, Zout Hardware Outcomes Loop
Gain Measurement
Condition

Fx Crossover
Frequency [kHz]

Phase -Margin
[deg]

35.71

47.49

23.91

41.23

16.90

32.92

PRM Output Port Referenced Output Impedance
-Measurement
Condition

Fo Peak
Freq [kHz]

Q(Tg) Factor

PM(Q) [deg]

29.18

1.059

44.44

20.78

1.184

40.59

15.01

1.619

31.50

Conclusion
A review of NISM and signal injection methods for assessing
stability has been provided. Simulation and hardware environs derived data for both regulator cases have been
observed to be consistent within their respective simulation
and hardware environments. Some modeling error in the
simulations of the PRM is to be expected as the small signal
model of the PRM was estimated based on a typical part's
parameters. Both the simulations and hardware tests for
PRM phase margin show that stability decreases with
reduced loads for a given compensation arrangement.
NISM merits examination in relation to paralleled converter modules, as well as composite systems in which a
regulator interfaces with a sine amplitude converter, characteristic of certain novel dc-dc converter introductions
where the regulator is embedded in a more complex module.

About the Author

FIG 12 TD response of PRM under LL with onset of load.

IEEE POWER ELECTRONICS MAGAZINE

z March 2021

David Bourner has worked as a senior field applications
engineer for Vicor Corporation for over ten years. He first
started with Vicor in Andover, MA 01810, United States in

IEEE Power Electronics Magazine - March 2021

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