IEEE Power Electronics Magazine - March 2022 - 43

voltage rating of the gate driver should be at least twice
that of the rated motor voltage for a high-power system.
If FOC control is required, the gate driver should have the
capability to support a six-PWM mode interface. This
design requires only one current measurement, and so we
select a gate driver with at least one current sense amplifier.
Gate drivers support a 3.3 V or 5 V logic level, and the
device should be selected to support the target logic voltage;
otherwise, a level shifter circuit will be required.
Another critical design constraint is the gate driving current
capability; a higher current gate driving capability
allows a maximum switching frequency.
■ MOSFET-Key specs to be considered while choosing
the MOSFET are given in Table III.
■ Sense Resistor-Selection of a sense resistor depends
on the rating of the current sense amplifier (CSA). A
proper design considers the trade-off between the highest
voltage at the CSA input and the sense resistor's power
loss (ohmic loss). This trade-off can be achieved by the
optimal solution of equations (1) and (2).
VI M A R
loss = M# sense
CSA = ## sense
PI R2
Where A is the CSA gain and Ploss
the sense resistor.
(1)
(2)
is ohmic power loss in
■ Peripheral Passives-A gate driver requires some passive
components for a proper operation like gate drive
resistors, charge pump capacitors, and decoupling capacitors
which vary from part to part. The datasheet should
be followed for the selection of such components.
■ Connectors-The connectors should be carefully chosen
for PCB mounting. Power connectors chosen should
respect the current ratings of the BLDC motor and input
supply. One key constraint is the mating cycle, which
should be high for plug-and-play devices, while the solder
pads work best with epoxy coatings for fixed connection
use cases.
PCB Design Challenges and Mitigation
Integrated gate drivers are offered in compact packages
that integrate analog signal chain components (sensors),
digital signal control (PWM), and power management (battery
and motor). The PCB design evolves around this central
component, and therefore it poses a unique challenge
in floor planning and layout of the PCB. A typical schematic
of a motor controller with an integrated gate driver is
shown in Figure 3.
Key PCB design constraints and the ways to mitigate
them are discussed below:
■ Grounding-The most crucial factor in designing a
mixed-signal PCB is grounding. Every signal on the PCB
requires a return path, and ideally, every signal must have
the return path as short as possible to minimize the loop
area. Every loop on the PCB can be an antenna that radiates
electromagnetic emissions. However, it is not always
possible to have the return path associated with every
signal; in such cases, the ground plane provides the
+
-
Cb Cf
Cph_dc
Vdc
T1
Vin
IN_1
IN_2
IN_3
IN_4
IN_5
IN_6
I_fb
Comm_1
Comm_2
G_3 S_3
G_2 S_2
S_1
G_1
Gate
Driver
G_6 S_6
S_4
G_4
A_GND D_GND P_GND
CSA_N
CSA_P
V_1
Rv1_a
Rv2_a
V_1 V_2 V_3
FIG 3 Sample schematic of a motor controller with integrated gate driver.
March 2022 z IEEE POWER ELECTRONICS MAGAZINE 43
G3
S3
G2
S2
S6
G6 T4
G6
S6
Rsense
V_2
Rv1_b
Rv2_b
V_3
Rv1_c
Rv2_c
Phase A
T6
G2
S2
Phase B
T2
T3
G5
S5
Phase C
T5
Cph_dc
Cph_dc
Controller
IEEE Power Electronics Magazine - March 2022

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