IEEE Power Electronics Magazine - March 2022 - 44

closest return path. The best way to ensure the minimal
loop is to use a four-layer PCB with the dedicated ground
plane. This setup ensures noise immunity in the signals;
however, the two-layer PCB can also provide a gridded
ground plane in cost-constrained designs.
Power
Ground
Signal
Ground
FIG 4 Proper grounding with separate signal and power
ground connected at one point.
The signal ground and power ground should not be the same;
these two planes should be connected with a small trace or
net tie, as shown in the schematic (Figure 3). The signal
ground analog (A_GND) and digital (D_GND) are separated
from the power ground (P_GND) but connected with a small
trace. This is also shown in the PCB layout in Figure 4.
■ Cable Radiated Emissions-Connecting cables are the
source of electromagnetic emissions and electromagnetic
interference. The connecting cables can also act as radiating
antennas and make the signals susceptible to noise.
Therefore, connectors should be placed on only one side
to mitigate these issues. The instances of connector
placements are shown in Figure 5.
(a)
■ Gate Driving Loops-For the best switching performance,
the end goal is to minimize the current loop
length for the high-side and low-side gate drivers. The
high-side loop (Figure 3) is from the G_1 to the power
MOSFET (T1) and returns through S_1. The low-side
loop is from the G_4 to the power MOSFET (T4) and
returns through S_4. It is recommended to use 15−20 mil
wide traces to support higher gate driving currents and
minimize gate drive inductance and impedance. Wide
traces have less inductance, and shorter traces have
lower impedance. Improperly designed gate drive traces
add significant inductance and cause gate drive turn on/
turn off issues and cause gate drive faults, worse EMI
performance, and charge pump undervoltage.
■ Routing Switching Signals-While routing a switching
signal, right-angled traces should never be used as they
form a radiation antenna. They should always be connected
at obtuse angles. Examples of worst and best
routing for a switching signal are shown in Figure 6.
■ Role of Decoupling and Bypass Capacitors-The supply
from the battery powers the motor; however, rapid
motor transients are supplied by the on-board bulk capacitor
Cb
(b)
FIG 5 Connector placement. (a) Connectors Placed on Different
Sides. (b) Connectors Placed on Same Sides.
(shown in Figure 3). Bulk capacitors are generally
electrolytic and should be placed at the input terminal;
these capacitors mitigate the low-frequency ripples in the
supply. Another set of filters f
C -generally ceramic capacitors-filters
out the high-frequency ripple. These components
can be seen in Figure 3. There are additional capacitors
provided ()Cph_dc
act as decoupling capacitors in addition to the bulk capacitor.
These components should be placed near the top side
of MOSFET as close as possible.
Worst Routing
Best Routing
FIG 6 Routing techniques.
44 IEEE POWER ELECTRONICS MAGAZINE z March 2022
■ High Current Routing-The traces from the battery to
the MOSFET and the motor connection must conduct a
very high current. For such high current applications, the
thickness of copper chosen for PCB should be at least 2 oz.
This provides higher current carrying capacity as well as
better thermal management. Often for high current capability,
polygon pours of copper are used instead of traces.
Still, the polygon pours should be as short and wide as possible
to minimize the inductive effect. Several vias can also
near each leg. These capacitors also
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