IEEE Power Electronics Magazine - September 2020 - 32

before proceeding to the off-stage VGS . Slight modifications
in levels and duration result in dramatic tradeoffs between
voltage overshoot and efficiency, allowing rapid experimentation to achieve optimal design choices across all development stages. While this two-level turn-off method is not new
in principle [15], the AgileSwitch family of gate driver products has fully digitized the technique, opening an unprecedented range of design flexibility for system optimization.
To illustrate the impact of AS, Figure 8 shows turn-off
waveforms using two AS profiles and a 1200 V SiC MOSFET
module from Microchip in a D3 package. It is evident how
a lower intermediate voltage level reduces switching losses
(where efficiency is a priority), while using an intermediate
voltage above the Miller plateau softens oscillations on all
three waveforms and dampens the overshoot on VDS . At the
click of a mouse, a designer can fine-tune these settings at
all stages along the development path.

Output Characteristics

IDS, Drain Source Current (A)

1,200

800
Tj = 175 °C

600
400

VGS = 18 V
VGS = 20 V

200
0

0.5
1
1.5
2
2.5
VDS, Drain Source Voltage (V)
(a)

Switching Energy Versus Drain Current
Tj = 150 °C

Losses (mJ)

10
8
Eon
6
4
Eoff

2
0

200

400

600

IDS, Drain Current (A)
(b)
FIG 7 (Top) Output characteristics and (bottom) switching energies of 1200 V, 2.5 mX SiC MOSFET half-bridge module in SP6LI
power package. (Source: Microchip Technology; used with permission.)

IEEE POWER ELECTRONICS MAGAZINE

z September 2020

Changes to turn-off profiles are set through an Intelligent
Configuration Tool (ICT) which is supplied with the driver
(Figure 9). On a separate ICT page are protection settings
for short circuit conditions, another area where the AgileSwitch family of gate drivers offers enhanced intelligence.
During a short circuit event, the gate driver triggers a turnoff profile different from that of normal turn-off; this can
include additional software-configurable voltage step-down
levels and durations. Incorporating AS methods into short
circuit protection reinforces the use of a low R g, as well as
guiding the MOSFET through a softer, more controlled
transition to the off state with reduced likelihood of avalanche. Still more configurable features include real-time
diagnostic measures, such as dc link voltage and temperature monitoring. With the ICT, the designer can experiment
with a variety of gate driver settings using a computer
mouse instead of a soldering iron, saving enormous
amounts of time and resources.

Total System Solution: ASDAK

Tj = 25 °C

1,000

Reconfigure With a Click

Microchip's ASDAK is a total system solution (TSS),
complete with SiC MOSFET, power package, and companion gate driver. It is common for today's SiC customers to source these components from three different vendors, placing the burden of making sure they play nicely
together on the end user. Technological solutions must
then be chased down with multiple parties whose timing
and priorities rarely sync; making matters worse, the
parties may not be willing to discuss key technology
details. This leaves many loose ends in the power system
due to oversight, mistakes, or unnecessary compromises. A unified, one-stop solution is much preferred by
the design community.
From an electrical standpoint, the package's interconnections to both the MOSFET die (internal) and gate driver
(external) must be tailored for the lowest inductance and
greatest symmetry. With in-house design and co-development of all three components, the ASDAK solution achieves
performance like that shown in Figure 10 right out of the
box. With AS, the use of an intermediate VGS = 0 V for
50 nanoseconds slashes the turn-off losses by 42%, from
14.97 mJ to only 8.73 mJ, while overshoot voltage fell 40%
(to 920 V) using VGS = 2.2 V for 100 ns. As discussed here
[14], the reconfigurable gate driver parameters allow the
user to fine-tune a compromise between switching losses
and overshoot voltage, effects whose optimization become
even more crucial upon insertion into the end system (e.g.,
bus bars).
Figure 11 shows the Microchip 2ASC-12A1HP gate driver
core tightly coupled with the SP6LI module through an
adapter board. (Adapter boards are also available for other
common package types for use with Microchip's AgileSwitch family of gate drivers.) The use of a finely-tuned,
ready-to-mount solution such as this enables designers
to fully optimize their thermal and mechanical systems,

IEEE Power Electronics Magazine - September 2020

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