42 IEEE POWER ELECTRONICS MAGAZINE z September 2021 Chip-Level Stacked Integration Mobile Multimedia GND -+ Vdd CMOS Feedback Planner Integration Out Substrate HIPC Technology and Applications GND Vin In -+ Substrate III-V Power Device Step-Down Vdd Vin In CMOS III-V Power Device CMOS CMOS Feedback Out Conductive-Via CMOS/III-V Die on Die MicroBonding -+ Vdd Vin In III-V Power Device CMOS Substrate GND CMOS Out Die-Transfer Stacked Integration FIG 6 Illustration of various applications of power converters utilizing HI technology and three main integration forms. Feedback Load CMOS/III-V Device by Device Load Load CMOS/III-V Chip to Chip Data Center Ion Battery APD Bias Step-Up Power Switching Stage UPS Car Battery Motor Drive