IEEE Power Electronics Magazine - September 2021 - 43

simplified buck converter solutions in data centers,
using 0.18 µm CMOS and GaN HEMT in Figure 7(a).
Here, III-V/CMOS-Die-to-Die technology is used to realize
the hybrid power system, high voltage E-mode GaN
transistor is connected to the low-voltage and logic SiCMOS
chip to achieve high voltage conversion radio of
16:1 and fast drive response. Besides, a peak efficiency
of 76% and peak measured power density of
05 . 5W/mm2
were achieved at a switching frequency
of 40 MHz.
Vipindas Pala [23] et al. demonstrated a fully integrated
100 MHz buck dc-dc converter using GaAs-pFET
and 0.18 µm CMOS technology. The schematic of the dc-dc
converter multichip module is shown in Figure 7(b). It
achieves a better peak efficiency of 83.8% when the voltage
convertion radio was 4.5-V/3-V. A peak power density
is 470 mW/mm.2
Besides vertical integration, planar III-V/CMOSChip-to-Chip
method has also been applied to stepdown
converters. For example, Krishna Shenai [19]
et. al. proposed the first planar co-integrated 12-V/1-V
10 W buck dc-dc converter chip with " Quilt Packaging "
(QP) technology, which refers to an edge interconnect
scheme that uses metal " nodules " built on the edges of
the chips for electrical mating. Figure 7(c) shows the
co-integrated converter chip, including CMOS control/
driver ICs, GaN power switch device, SiC diode die, and
inductor/capacitor chips. The enhancement-mode GaN
power MISHEMT is made with InAlN/AlN/GaN heterostructures.
This buck converter achieved 89% overall
efficiency operating at 1 MHz.
B. Step-Up dc-dc Converter
M. Liu [21] et. al. proposed a HI open-loop 300 MHz class-E
step-up converter using integrated passive devices (IPD)
technology. As shown in Figure 8(a-b), all passive elements
were designed by frequency domain scanning to ensure processing
size. The 0.25-µm D-mode GaN FET and diodes dies
were flip-chip assembled on the Si-IPD platform to reduce
parasitic effects. To mitigate the additional effort of using
the IPD platform, our group designed a 3.3-V to 70-V boost
dc-dc converter using 0.18-µm CMOS/GaN-Die-on-Die technology
in [24] as shown in Figure 8(c-d). The commercial
and standard enhancement-mode (E-mode) GaN HEMT
produced by Efficient Power Conversion Corp.(EPC) was
adopted for the switching matrix [25]. The control circuits
and interconnections were implemented using CMOS. The
obtained power density is as high as
291 .67 mW/mm.2
C. Power Switching Modules
HI has been adopted in power switching module designs for
LED drivers, half-bridge synchronous drivers, etc. In [35], X.
Table IV. Comparison of bulk Si, HI switching power
stages.
Ref.
Technology
[35] III-V/CMOS-Device-by-Device
[36]
[37]
[38]
[39]
III-V/CMOS-Chip-to-Chip
Bulk Si CMOS
Bulk Si
Bulk Si
VTH
0 ~ 5V
VIN
1.28 ~ 2.22V 80V
0.6 ~ 2V
3.3 ~ 5V
0 ~ 3.3V
15V
80V
fMAX
200V 200kHz
10MHz
2MHz
25V 1.25MHz
500kHz
(a)
(b)
(c)
FIG 7 HI-enabled step-down converter: (a) A fully integrated 40 MHz buck dc-dc converter chip using CMOS/GaN die-to-die technology
[15]; (b) A 100 MHz fully-integrated GaAs/CMOS buck dc-dc converter [16]; (c) A fully-integrated 5 MHz buck dc-dc converter
with planar interconnection [8].
September 2021 z IEEE POWER ELECTRONICS MAGAZINE 43
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