IEEE Power Electronics Magazine - September 2021 - 45

Copper
Controller and Driver
Polyimide/E-Poxy
Copper
(a)
High-Q
Inductor
Chip
+
-
In
III-V Power
Out
CMOS
Substrate
Vdd
Planner/Vertical
Interconnect
(b)
FIG 10 (a) PCB diagram of power conversion circuit including power switch/diode connected with CMOS control IC by on-board copper
lines. (b) A schematic of proposed HI power converter SoC targeting new generation power electronics.
high power density, and high switching frequency over
monolithic methods, there is still much room for further
research. In Figure 10(b), we propose a new and generic HI
method towards further enhancement in the area of integration,
power loss, and fabrication cost. The III-V power
devices are directly bonded to Si CMOS chips using di-ondie
integration. The planar and vertical interconnections
are adopted across the chips for compactness. Metal-tometal
micro-bonding adopted between III-V power devices
reduces the interconnection between devices, which
reduces parasitic loss and improves switching frequency.
This proposed HI method supports monolithic CMOS and
III-V fabrication technology, as well as the co-integration
of commercial III-V power devices. To put it in a nutshell,
the HI technology still has a broad area of development in
power conversion electronics.
V. Conclusion
This paper reviews the recent progress of power conversion
electronics using HI technologies. With analysis of
power converter circuit model, the benefits of using HI are
investigated, which demonstrates advantages of higher
operation frequency, higher power density, and reduced
parasitics theoretically.
With the study of several recently reported state-ofthe-art
HI-enabled power converters, the pros/cons are
summarized with detailed performance comparison
to conventional monolithic converters. The III-V/
CMOS-device-by-device method shows high integration
level but low conversion efficiency. The III-V/CMOSchip-to-chip
method shows improved design freedom,
but the process is complex with potential parasitic issues.
And the III-V/CMOS-die-on-die has a direct fabrication
September 2021 z IEEE POWER ELECTRONICS MAGAZINE 45
Micro-Bonding
Feedback
GND
Load
Vin
Integrated Inductor
Integrated Capacitor

IEEE Power Electronics Magazine - September 2021

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