Signal Processing - November 2017 - 169

LUT Contents (°)

Diff (LUT Contents) (°)

0.2
|fr |
(a)

0.10

0.4

Conclusions

These Points
Set the
Worst Case

0.05

0
0

0.2
|fr |
(b)

On the contrary, [4, (eq. 18)] achieves
better accuracy than [2, (eq. 2)], but when
a second-stage LUT is added, their accuracy is similar. That's because, in this case,
they have similar maximum values of
the first derivative of their error curves.
An important lesson learned is that atan2
approximations with smaller first derivative error values are better suited for the
addition of a second-stage LUT.

0.4

FIGURE 6. LUT characteristics: (a) LUT contents and (b) absolute value for the derivatives
of the LUT contents for our proposal (solid
line) and [6, eq. (12)] (dashed line).

computed, using a modified -version of
the "errorLUTcontents" function, and
the maximum atan2 error was measured
for several LUT sizes. The results are
shown in Figure 5. When a second-stage
LUT is used, the accuracy is improved
significantly. As can be seen, the maximum error is halved (i.e., one exact bit
more is achieved) when the size of the
LUT is doubled.
Another interesting observation is that,
when the second stage is added, the atan2
maximum error depends on the maximum first derivative of the error curve
stored in the LUT. This explains why, for
example, for the same atan2 accuracy, [6,
(eq. 12)] would require a LUT twice as
large as ours. Figure 6(a) shows the LUT
contents for both approaches: ours with a
solid line and [6, eq. 12)]'s with a dashed
line. Figure 6(b) shows the absolute value
of the difference between consecutive
values in the LUT, for the specific case
of an LUT with 256 words. As can be
seen in those figures, our approach has a
smaller maximum of the absolute value
of the first derivative of the error curve.

We propose a full-quadrant algorithm for
the computation of the arctangent of a
complex number c = b + ja, particularly
suitable for implementations in hardware,
e.g., FPGA, ASIC, etc., where there is no
penalty incurred when accessing a LUT.
The second stage of the method we propose could be applied to other low-complexity algorithms for the approximation
of the atan2 function, but for a given
accuracy there is a tradeoff between the
complexity of the approximation used for
the first stage and the required storage
resources used in the second stage. As
we have shown, algorithms with a smaller first derivative of their error curve are
best suited for improving the accuracy
by the addition of a second-stage LUT.
Because our proposed method can be
easily improved by increasing the size
of a memory when higher accuracy is
needed, it is an attractive arctan method
in high-speed applications where moderate accuracy is required (e.g., in systems
where the precision of the measured a
and b variables is, say, 14 bits or fewer).

Acknowledgments
This work is funded by the Spanish
Ministerio de Economía y Competitividad and FEDER under grant TEC201570858-C2-2-R.

Authors
Vicente Torres (vtorres@eln.upv.es)
received a telecommunications engineering degree from the Universitat
Politecnica de Valencia (UPV) in 1994
and received the Ph.D. degree in telecommunication engineering from the
same university in 2001. He is an associate professor at UPV. He is currently a member of the Institute for
Telecommunications and Multimedia
IEEE SIGNAL PROCESSING MAGAZINE

November 2017

Applications. His research work is
focused on digital signal processing in
electronic devices. He has contributed
to more than 50 papers in renowned
technical journals and conferences and
has been an active member of several
financially aided research projects.
Javier Valls (jvalls@eln.upv.es)
received the telecommunication engineering degree from the Universitat
Politecnica de Catalunya, Spain, and the
Ph.D. degree in telecommunication
engineering from the Universitat
Politecnica de Valencia, Spain, in 1993
and 1999, respectively. He has been with
the Department of Electronics at the
Universitat Politecnica de Valencia since
1993, where he is an associate professor.
His current research interests include the
design of field-programmable gate
array-based systems, computer arithmetic, very-large-scale integration signal
processing, and digital communications.
Richard Lyons (R.Lyons@ieee.org)
is a consulting signal processing engineer. Winner of the IEEE 2012 Education
Award, he is the author of Understanding
Digital Signal Processing 3/E (Prentice
Hall, 2010). He is the editor of, and contributor to, Streamlining Digital Signal
Processing, A Tricks of the Trade
Guidebook (IEEE Press/Wiley, 2007)
and the coauthor of The Essential Guide
to Digital Signal Processing (Prentice
Hall, 2014).

References

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[3] S. Rajan, S. Wang, R. Inkol, and A. Joyal, "Efficient
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2006.
[4] X. Girones, C. Julia, and D. Puig, "Full quadrant
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[5] J. M. Shima, "FM demodulation using a digital
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472-475.

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