IEEE Signal Processing Magazine - January 2018 - 149

This rate constitutes a relatively small oversampling factor of
20% with respect to the theoretical lower sampling bound.
This section describes the different elements of the hardware
prototype, which are shown in Figure 12, and explains the various considerations that were taken into account when implementing the theoretical concepts on actual analog components.
At the heart of the system lies the proprietary MWC board
[49] that implements the sub-Nyquist analog front end. The
card uses a high-speed one-to-four analog splitter that duplicates the wide-band signal to M = 4 channels, with an expansion factor of q = 5, yielding M q = 20 virtual channels after
digital expansion. Then, an analog preprocessing step, composed of preliminary equalization, impedance corrections, and
gain adjustments, aims at maintaining the dynamic range and
fidelity of the input in each channel. Indeed, the signal and
mixing sequences must be amplified to specific levels before
entering the analog mixers to ensure proper behavior emulating mathematical multiplication with the mixing sequences.
The entire analog path of the multiband input signal can be
seen in Figure 13.
The modulated signal next passes through an analog antialiasing LPF. The antialiasing filter must be characterized
by both an almost linear phase response in the passband
from 0 to 50 MHz and an attenuation of more than 20 db at
fs 2 = 60 MHz. A seventh-order type I Chebyshev LPF with
a cutoff frequency (-3 dB) of 50 MHz was chosen for the
implementation. After impedance and gain corrections, the
spectral content of the signal is limited to 50 MHz and contains a linear combination of the occupied bands with different
amplitudes and phases, as seen in Figure 7. Finally, the low-rate
analog signal is sampled by a National Instruments ADC operating at 120 MHz, leading to a total sampling rate of 480 MHz.
The mixing sequences that modulate the signal play an
essential part in signal recovery. They must have low cross correlations with each other, while spanning a large bandwidth
determined by the Nyquist rate of the input signal, and yet be

Nonuniform
Frequency Response

Noise and
Harmonics

Splitter +
Preprocessing

Mixer

x (t )

LPF-Noise
and Phase Shift

LPF

Splitter
Noise

Quantization Noise
+ Phase Noise

nTs

AMP

Digital
Expander

ATT

pi (t )
Unknown
Phase

easy enough to generate with relatively cheap, off-the-shelf hardware. The sequences p i (t), for i = 1, f, 4 are chosen as truncated versions of Gold codes [54], which are commonly used in
telecommunication (code division multiple access) and satellite
navigation (global positioning system). Mixing sequences based
on Gold codes were found to give good results in the MWC system [55], primarily due to their small cross correlations.
Because Gold codes are binary, the mixing sequences are
restricted to alternating ! 1 values. This fact allows the digital
generation of the sequences on a dedicated field-programmable gate array (FPGA). Alternatively, they can be implemented
on a small microchip with very low power and complexity. The
added benefit of producing the mixing sequences on such a platform is that the entire sampling scheme may be synchronized
and triggered using the same FPGA with minimally added
phase noise and jitter, keeping a closed synchronization loop
with the samplers and mixers. An XiLinX VC707 FPGA
evaluation kit acts as the central timing unit of the entire subNyquist CR setup by generating the mixing sequences and the
synchronization signals required for successful operation. It is
crucial that both the mixing period T p and the low-rate samplers operating at (q + 1) f p (due to intended oversampling) are
fully synchronized to ensure correct modeling of the entire
system and, consequently, guarantee accurate support detection and signal reconstruction.
The digital back end is implemented using a National
Instruments PXIe-1065 computer with a dc-coupled ADC.
Because the digital processing is performed at the low rate fs,
very low computational load is required to achieve real-time
recovery. MATLAB and LabVIEW environments are used
for implementing the various digital operations and provide
an easy and flexible research platform for further experimentations, as discussed in the next sections. The sampling
matrix A is computed once offline, using the calibration process outlined in [50] and described in "Hardware Calibration
of the MWC."

zi [n ]

Sync Trigger + CLK
nTs
Clock Delta

FIGURE 13. The hardware RF chain detailed schematics, including the amplifiers, attenuators, filters, mixers, samplers, and synchronization signals required for precise and accurate operation. The distortions induced by each component are indicated as well. Freq.: frequency; ATT: attenuator; CLK: clock.
IEEE SIGNAL PROCESSING MAGAZINE

January 2018

149

Table of Contents for the Digital Edition of IEEE Signal Processing Magazine - January 2018