IEEE Solid-State Circuits Magazine - Fall 2015 - 12
Combination with Other Techniques
The bridged T-coil network can be
combined with other high-speed
topologies so as to achieve greater
bandwidths. For example, since the
input impedance of the second-order
T-coil circuit is constant, one can
readily add series peaking in the input
signal path. Illustrated in Figure 7,
this combination proves useful in two
cases: 1) if a stage incorporates a large
transistor [Figure 7(a)], suffering from
a high output capacitance, C 1, or 2) if
an input network must accommodate
a large ESD capacitance [Figure 7(b)],
in which case both capacitors can
represent ESD devices. Series peaking can also be applied to output networks such as that in Figure 5.
Differential circuits can combine
T-coils with other differential techniques. For example, as shown in
Figure 8, a negative capacitance generator using a cross-coupled pair can
be added in parallel with the load
capacitance [6], thereby improving
the overall speed. To avoid significant overshoot in the time response,
we choose C N . C B /4.
VDD
CB
RD
RD
L2
L2
L1
L1
CB
CL
CL
CN
Figure 8: The addition of a negative capacitance generator to T-coil network.
400
350
300
Ron (Ω)
CK
M1
Vin
Vout
200
150
C1
M2
250
100
50
0.0
CK
Questions for the Reader
0.2
0.4
0.6 0.8
Vin (V)
(a)
1.0
1.2
(b)
Figure 9: The on-resistance of complementary switches as a function of input voltage.
1) Use a power dissipation argument
to determine the transfer function
of the circuit shown in Figure 4(b).
2) In Figure 7(a), how should L S be
chosen if the damping factor of
the series peaking network must
remain around 2 /2?
Answers to Last Issue's Questions
CK
VDD
VDD
P
M3
CK
M8
X
M14
M10
Cb
M9
M12
Vin
Vout
M11
C1
Figure 10: A bootstrap circuit.
12
fa l l 2 0 15
CK
IEEE SOLID-STATE CIRCUITS MAGAZINE
1) In Figure 9, we write R on = R 0 +
R 1 cos 2~ in t +R 2 cos 4~ in t +g and
assume R 1 . R 0 . Suppose we define the small-signal bandwidth
of the sampler as ~ 3dB = (R 0 C 1) -1 .
Determine the ratio of ~ in to this
bandwidth if the third-order distortion given by R 1 C 1 ~ in /2 must
remain lower than -60 dB. This
example demonstrates the severity of the variable on-resistance.
For the distortion to remain
below -60 dB, we must have
R 1 C 1 ~ in /2 1 10 -3 . Replacing
R 1 C 1 . R 0 C 1 with 1/~ 3dB, we
have ~ in /~ 3dB 1 1/500. This example shows that the sampler's
Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Fall 2015
IEEE Solid-State Circuits Magazine - Fall 2015 - Cover1
IEEE Solid-State Circuits Magazine - Fall 2015 - Cover2
IEEE Solid-State Circuits Magazine - Fall 2015 - 1
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