IEEE Solid-State Circuits Magazine - Fall 2015 - 97

High-Speed Logic Transistor

High-Voltage I/O Transistor

(a)

(b)

Figure 6: (a) A die map of Intel's 1.3 B transistor Broadwell processor. (b) Fin/gate cross-sectional TEMs of 14-nm logic (top) and HV I/O
transistors (bottom).

presents a 40-Gb/s equalizer suitable
for wavelength-division multiplexing that adds in a discrete time linear
equalizer (DTLE) to a one-stage continuous time linear equalizer (CTLE) and
two-tap/quarter-rate decision feedback
equalizer (Figure 3). The DTLE is much
more energy efficient than the CTLE,
and the overall equalizer consumes
only 9.2 mW while compensating for
20 dB of channel loss at Nyquist.

14-nm Computing Platform
Intel Corporation presented the device
technology, SRAM, and processor family based on its 14-nm, second-generation trigate transistor. The transistor
[Figure 4(b)] is optimized for density,
low-power, and wide dynamic range,
with 1.3 µA/mm and 1.2 µA/mm for
N/PMOS, respectively, at 100 nA/mm
off-state leakage. The SoC technology
further includes high-voltage devices
for a full range of analog, mixed-signal, RF features and up to 3.3-V I/Os.
In this technology, the Broadwell
processor family [Figure 4(b)] achieves
a 2.5x total die power reduction compared to earlier generations, with 60%
higher graphics performance. Particularly, as the supply voltages are shrinking, voltage droops must be strictly
controlled to maintain performance.
Broadwell uses a nonlinear control
loop in their fully integrated voltage regulators to reduce droop. For
a smaller package, they also embed
3-D air core inductors as a module attached underneath the die, extending
into a cavity on the motherboard.

Short Courses

"Is University Circuit Design Research and Education Keeping Up
with Industry Needs?"
■ "Wearable Electronics: Still an
Oasis or Just a Mirage for the
Semiconductor Industry?"
Panelists and audience members joined
in trying to provide some answers. In
addition, the symposia featured a Joint
Technology Circuit Banquet for more
opportunities to meet and eat.
For a look at a different but wholly
interesting industry, the symposia
included the luncheon talk, "From
'Loser in the small village' to the
'Global Sake'," given by Kazuhiro Sakurai, senior executive vice president of
Asahi-shuzo Co. After showing how
Dassai Sake achieved global success,
even though it could not penetrate the
authentic Japanese restaurant market,
the luncheon finished with a sake tasting for all. This naturally made the
afternoon question and answers periods more interesting.
To continue the exchanges and
networking, conference participants
and others interested in VLSI technology and circuit design are encouraged
to join the LinkedIn group, Symposia
on VLSI Circuits and Technology, to
participate in discussions about the
conference topics: http://www.linkedin.com/grp/home?gid=3037968.
■

Three full-day short courses focused in
on the key themes of the conference.
The technology short course, "MoreThan-Moore and More Moore for IoT,"
included ten lectures covering topics
from low-leakage field-effect transistors, embedded low-power memory, microelectromechanical systems sensors,
wireless energy transfer, and energy harvesting. Moving to circuits and systems,
a circuits short course, "Analog and
Digital Circuit Design for IoT Swarms,"
continued with power management, ultralow-power analog front ends, RF, microcontrollers, and nonvolatile memory
for normally-off computing.
The second circuits short course
presented six papers on "VLSI Design
for Big Data Management." The main
topics included data processing in
central processing unit and FPGAbased systems, high-bandwidth I/O,
and high-performance power management for Watt-level, instead of the
IoT µW-level, systems.

Socializing
As one of the few events that features
both technology and circuits participants, the traditionally designed Rihga
Royal Hotel Kyoto provided the setting
for various social events and opportunities for networking and exchang
among this diverse set of colleagues.
Four evening panels addressed the following questions:
■ "Semiconductor Industry in 2020:
Evolution or Revolution?"
■ "Post Scaling: What Will Be Next?"

VLSI Symposia, Past and Future
The annual Symposia on VLSI Technology and Circuits are regarded
(Continued on p. 107)

IEEE SOLID-STATE CIRCUITS MAGAZINE

fa l l 2 0 15

http://www.linke http://www.din.com/grp/home?gid=3037968

Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Fall 2015