IEEE Solid-State Circuits Magazine - Fall 2017 - 108

in Intel Labs, held a DL seminar at
the SCV-SSCS Chapter on 20 July.
The talk covered an overview of the
history of computing and challenges
and recent developments from her
team at Intel. Over 100 SSCS members in the San Francisco Bay area
attended the seminar to hear about recent
advancements and ask the speaker
questions. The slides for this seminar are available on the SCV-SSCS
Chapter website under previous events,
and the video recording will be available online.

Abstract

Prof. Hanumolu explaining a recent publication in response to seminar attendees at the SCVSSCS Chapter.

neural networks (CNNs) and ex plained each layer in detail. Various architecture optimization techniques were also covered, including
data optimization, drop outs, layer
patterns, and sizing. A comprehensive case study of recent CNN architectures including AlexNet, ZFNet
and GoogleNet was provided.
This hands-on workshop series
was very well received with all 150
attendees actively performing programming-guided exercises on machine
learning. SSCS Chapter Chair Mojtaba
Sharifzadeh concluded the event by
thanking the speaker and announced
upcoming sponsored and cosponsored
2017 seminars.

"Channel Selection at RF"
Prof. Behzad Razavi held a seminar as
part of the SSCS DL webinar series at
the SCV-SSCS Chapter on 15 June. This
seminar was recorded at the Texas
Instruments venue and is scheduled
to become an SSCS webinar for members. Prof. Razavi will be available
online after the webinar to answer
questions. Stay tuned for announcement e-mails from the Society.

selection at RF to remove strong interferers and even out-of-channel noise
at the receiver input rather than in the
baseband. Such an approach is attractive for it obviates the need for surface acoustic wave filters and greatly
relaxes the linearity requirements of
the receiver chain, ultimately leading
to a lower power consumption and a
more compact design.
This research demonstrates a universal complementary metal-oxidesemiconductor (CMOS) receiver by
employing RF channel selection and
meeting the exacting demands of the
Global System for Mobile Communications and wideband code division multiple access. Drawing upon commutated
networks, we introduce the concept
of the "Miller bandpass filter" and several of its variants to create a receiver
that achieves a narrow channel bandwidth and can withstand large blockers. Realized in 65-nm technology, the
prototype provides a programmable
bandwidth from 350 kHz to 20 MHz and
draws 20 mW. The noise figure is 2.9 dB
in the absence of blockers and 5 dB with
a 0-dBm blocker at 20-MHz offset.

Abstract

"Energy Efficient Computing
in Nanoscale CMOS"

A holy grail in radio-frequency (RF)
design has been to perform channel

Dr. Vivek De, Intel Fellow and director of Circuit Technology Research

108

FA L L 2 0 17

IEEE SOLID-STATE CIRCUITS MAGAZINE

Future computing systems spanning
exascale supercomputers to wearable devices demand orders of magnitude improvements in e n e r g y
efficiency while providing desired performance. The system-on-chip (SoC)
designs need to span a wide range of
performance and power across diverse
platforms and workloads. The designs
must achieve robust, near-thresholdvoltage operation in nanoscale CMOS
process, while supporting a wide voltage-frequency operating range with minimal impact on die cost.
We will discuss circuit and design
technologies to overcome the challenges posed by device parameter
variations, supply noises, temperature excursions, aging-induced degradations, workload and activity
changes, and reliability considerations. The major pillars of energyefficient SoC designs are 1) circuit/
design optimizations for fine-grain
multivoltage and wide dynamic range,
2) fine-grain on-die power delivery
and management, 3) dynamic adaptation and reconfiguration, 4) dynamic
on-die error detection and correction,
and 5) efficient interconnects.

"Applications of Time-Based Circuits
in Data Conversion, Filtering, and
Control, Part 2"
As part of the SSCS webinar program,
the SCV-SSCS Chapter organized a
comprehensive two-part seminar on
time-based circuits. The presentation
materials of these seminars will be
available on the SCV-SSCS Chapter website, and the video recording will be

Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Fall 2017