IEEE Solid-State Circuits Magazine - Fall 2017 - 132

SSCS Vice President Bram Nauta Inducted to
the Royal Dutch Academy of Arts and Sciences

I

IEEE Solid-State Circuits Society
(SSCS) Vice President Bram Nauta was
inducted into the Royal Dutch Academy of Arts and Sciences in June.
Nauta is a professor at the University of Twente, heading the Integrated
Circuits Design group. His current
research interests are high-speed analog complementary metal-oxide-semiconductor circuits, software-defined
radio, cognitive radio, and beamforming.
Academy membership is a great
honor in The Netherlands. The academy appoints a maximum of 16 new
members every year. Membership is
awarded based on an individual's scientific and scholarly achievements.

Digital Object Identifier 10.1109/MSSC.2017.2746193
Date of publication: 16 November 2017

Bram Nauta

Once appointed, indiv iduals are
members for life. Members meet and
discuss issues of interest to science,
scholarship, and society. Academy

A C IRCU IT FOR ALL SEA SONS

members represent a wide spectrum
of scientific and scholarly disciplines,
giving all members the opportunity to embrace new fields in science
and scholarship.
Nauta was inducted as a result of
the work he performed throughout
his career and it was a great honor.
"It was a surprise for me," Nauta
said, "especially because I'm an electrical engineer working on the application side of science."
He hopes his induction will open
new doors for him, especially outside
his own scientific field.
For more information about the
Royal Dutch Academy of Arts and Sciences, visit https://www.knaw.nl/nl.
-Abira Sengupta

(continued from p. 16)

+

VF

+

Vin

+

+

-

VF − VF

-

VF − VF
Flash
ADC

-

Vin

+

CK1
(a)

1.5

-

Vin − Vin

-

VF

CK2

(b)

+
-
Vin − Vin (LSB)

(c)

FIGURE 10: (a) The flash stage preceded by a polarity detector and (b) the resulting characteristic and the characteristic in the presence of
comparator offset.

References

[1] M. E. Austin, "Decision-feedback equalization for digital communication over
dispersive channels," Tech. Rep. 437, Lincoln Laboratory, Aug. 1967.
[2] J. Jung and B. Razavi, "A 25 Gb/s 5.8 mW
CMOS equalizer," IEEE J. Solid-State Circuits, vol. 50, pp. 515-526, Feb. 2015.
[3] S. Kasturia and J. H. Winters, "Techniques for high-speed implementation of
nonlinear cancellation," IEEE J. Selected

132

FA L L 2 0 17

Areas Commun., vol. 9, pp. 711-717, June
1991.
[4] J. F. Bulzacchelli, M. Meghelli, S. V. Rylov,
W. Rhee, A. Rylyakov, H. A. Ainspan, B. D.
Parker, M. P. Beakes, A. Chung, T. J. Beukema, P. K. Pepeljugoski, L. Shan, Y. H.
Kwark, S. Gowda, and D. J. Friedman, "A
10-Gb/s 5-tap DFE/4-tap FFE transceiver
in 90-nm CMOS technology," IEEE J. SolidState Circuits, vol. 41, no. 12, pp. 2885-
2900, Dec. 2006.

IEEE SOLID-STATE CIRCUITS MAGAZINE

[5] R. Payne, P. Landman, B. Bhakta, S. Ramaswamy, S. Wu, J. D. Powers, M. U. Erdogan, A. Yee, R. G. L. Wu, Y. Xie, B. Parthasarathy, K. Brouse, W. Mohammed, K.
Heragu, V. Gupta, L. Dyson, and W. Lee, "A
6.25-Gb/s binary transceiver in 0.13-um
CMOS for serial data transmission across
high loss legacy backplane channels,"
IEEE J. Solid-State Circuits, vol. 40, no. 12,
pp. 2646-2657, Dec. 2005.
https://www.knaw.nl/nl
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