IEEE Solid-State Circuits Magazine - Fall 2017 - 137

DOSRAM, a 100-MHz normally off CPU
was successfully demonstrated with dramatically reduced power consumption,
94% for CPU core and 70% for memory.

Toward Autonomous Driving

Hall Mobility (cm2/Vs)

by a functionally distributed facial
recognition s y ste m that reduced
data rates by five times.
One of the many contributions
presented to the symposia from the University of Michigan was the Recryptor, a
compact advanced RISC-machine-M0based reconfigurable cryptographic
processor for IoT. This processor is capable of performing various cypher algorithms with state-of-the-art efficiency
due to a programmable in-memory calculation block that accelerates wide bit
width arithmetic operations (Figure 1). In
40-nm complementary-metal-oxide
semiconductors (CMOS), the resulting
performance was seven times faster
and had 13 times lower energy than
previous accelerated implementations.
During one of the joint Technology-Circuits focus sessions, "Ultra-Low
Power for the IoT," researchers from
United Microelectronics Corp. demonstrated the world's first 100-MHz
dynamic oxide semiconductor RAM
(DOSRAM) using a new high-mobility
InGaZnO material. The un derlying
technology advance, as shown in Figure 2, is a nearly two-times increase
in the mobility of the indium gallium
zinc oxide (IGZO) channel. Using this

35
30
New IGZO
25
20
15
Conventional
10
IGZO
5
15
16
17
18
19
10 10 10 10 10 1020 1021
Carrier Concentration (/cm3)

FIGURE 2: A comparison of Hall mobility
between new and conventional IGZO.

Advanced drive assistance function
systems in today's cars will become
partially automated systems within
several years, and it is only a matter of
time before vehicles are fully autonomous. These trends are evident in the
rapid development of lidar, radar, and
vision-sensing systems, which were
also on display at the 2017 Circuits Symposium.

The second plenary session, "Inside Waymo's Self-Driving Car: My
Favorite Transistors," was delivered
by Dr. Daniel Rosenband of Waymo. He
highlighted the diverse set of technologies needed to enable automated driving functions and explained that many
of these technologies are built upon
advanced semiconductor designs.
For example, direct time-of-flight lidar
systems rely on high-speed comparators to accurately capture the timing of
echo signals, which are then translated into range information for a
three-dimensional (3-D) image. Similarly, vision systems for self-driving

Daniel Rosenband of Waymo, delivering one of two Circuits plenary sessions.

SPAD and Front-End Circuit Block From Address Decoder
V_SPAD (+25.5 V)
Quenching
Resistor
(300 kΩ)

Data Line
To
Correlation Detector

Bias

ac Couple
(5fF)

SPAD

Address Decoder

Pull-Up
Resistor for
Open Drain
Valid

PLL
TDC

Clock (600 MHz, 8 Phase)
Timing
Control
Logic

Peak Count

Macro Pixel
(2 × 4 SPAD)
32 × 4
Pixel Array

Data Line

Correlation
Detector
and
Peak Counter

Data

Address

Memory
External
Read Out

FIGURE 3: A block diagram of Denso's 2-D SPAD array imager chip.

IEEE SOLID-STATE CIRCUITS MAGAZINE

FA L L 2 0 17

137

Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Fall 2017